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DM9010BEP データシート(PDF) 49 Page - Davicom Semiconductor, Inc.

部品番号 DM9010BEP
部品情報  10/100 Mbps Single Chip Ethernet Controller With General Processor Interface
PDF  62 Pages
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メーカー  DAVICOM [Davicom Semiconductor, Inc.]
ホームページ  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.

DM9010BEP データシート(HTML) 49 Page - Davicom Semiconductor, Inc.

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DM9010B
Single Chip Ethernet Controller with General Processor Interface
Preliminary
49
Version: DM9010B--DS-P01
September 5, 2007
10.3 AC Electrical Characteristics & Timing Waveforms
10.3.1 TP Interface
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
tTR/F
100TX+/- Differential Rise/Fall Time
3.0
-
5.0
ns
tTM
100TX+/- Differential Rise/Fall Time
Mismatch
0
-
0.5
ns
tTDC
100TX+/- Differential Output Duty Cycle
Distortion
0
-
0.5
ns
tT/T
100TX+/- Differential Output Peak-to-Peak
Jitter
0
-
1.4
ns
XOST
100TX+/- Differential Voltage Overshoot
0
-
5
%
10.3.2 Oscillator/Crystal Timing
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
TCKC
TCKC
39.998
40
40.002
ns
50ppm
TPWH
OSC Pulse Width High
16
20
24
ns
TPWL
OSC Pulse Width Low
16
20
24
ns
10.3.3 Power On Reset Timing
PWRST#
Strap pins
T2
T1
EECS
T3
T4
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
T1
PWRST# Low Period
1
-
-
ms
-
T2
Strap pin hold time with PWRST#
40
-
-
ns
-
T3
PWRST# high to EECS high
-
11.31
-
us
T4
PWRST# high to EECS burst end
-
--
3
ms
Note: The DM9010B needs the time about 3ms to down load the setting from EEPROM after PWRST# deasserted,
During the period, the processor command (IOR#, IOW#, AEN#) pins are not recognized even no EEPROM present. So,
please note that processor only access DM9010B after PWRST# deasserted 3ms.



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