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AM1808 データシート(PDF) 66 Page - Texas Instruments

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部品番号 AM1808
部品情報  AM1808 ARM Microprocessor
PDF  264 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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AM1808 データシート(HTML) 66 Page - Texas Instruments

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AM1808
SPRS653 – FEBRUARY 2010
www.ti.com
5.2
Recommended Operating Conditions
NAME
DESCRIPTION
CONDITION
MIN
NOM
MAX
UNIT
CVDD
Core Logic Supply Voltage (variable)
1.3V operating point
1.25
1.3
1.35
V
1.2V operating point
1.14
1.2 or 1.26
1.32
V
1.1V operating point
1.05
1.1
1.16
V
1.0V operating point
0.95
1.0
1.05
V
RVDD
Internal RAM Supply Voltage
1.14
1.2 or 1.26
1.32
V
RTC_CVDD (1)
RTC Core Logic Supply Voltage
0.9
1.2 or 1.26
1.32
V
PLL0_VDDA
PLL0 Supply Voltage
1.14
1.2 or 1.26
1.32
V
PLL1_VDDA
PLL1 Supply Voltage
1.14
1.2 or 1.26
1.32
V
SATA_VDD
SATA Core Logic Supply Voltage
1.14
1.2 or 1.26
1.32
V
USB_CVDD
USB0, USB1 Core Logic Supply Voltage
1.14
1.2 or 1.26
1.32
V
USB0_VDDA18
USB0 PHY Supply Voltage
1.71
1.8
1.89
V
USB0_VDDA33
USB0 PHY Supply Voltage
3.15
3.3
3.45
V
USB1_VDDA18
USB1 PHY Supply Voltage
1.71
1.8
1.89
V
Supply
Voltage
USB1_VDDA33
USB1 PHY Supply Voltage
3.15
3.3
3.45
V
SATA_VDDR
SATA PHY Internal Regulator Supply Voltage
1.71
1.8
1.89
V
DDR_DVDD18
DDR2 PHY Supply Voltage
1.71
1.8
1.89
V
0.5*
0.49*
0.51*
DDR_VREF
DDR2/mDDR reference voltage
DDR_DVDD1
V
DDR_DVDD18
DDR_DVDD18
8
DDR2/mDDR impedance control,
DDR_ZP
Vss
V
connected via 50
Ω resistor to Vss
1.8V operating point
1.71
1.8
1.89
V
Power Group A Dual-voltage IO
DVDD3318_A
Supply Voltage
3.3V operating point
3.15
3.3
3.45
V
1.8V operating point
1.71
1.8
1.89
V
Power Group B Dual-voltage IO
DVDD3318_B
Supply Voltage
3.3V operating point
3.15
3.3
3.45
V
1.8V operating point
1.71
1.8
1.89
V
Power Group C Dual-voltage IO
DVDD3318_C
Supply Voltage
3.3V operating point
3.15
3.3
3.45
V
Supply
VSS
Core Logic Digital Ground
V
Ground
PLL0_VSSA
PLL0 Ground
V
PLL1_VSSA
PLL1 Ground
V
SATA_VSS
SATA PHY Ground
0
0
0
V
OSCVSS(2)
Oscillator Ground
V
RTC_VSS(2)
RTC Oscillator Ground
V
USB0_VSSA
USB0 PHY Ground
V
USB0_VSSA33
USB0 PHY Ground
V
Voltage
VIH
High-level input voltage, Dual-voltage I/O, 3.3V(3)
2
V
Input High
High-level input voltage, Dual-voltage I/O, 1.8V (3)
0.65*DVDD
V
High-level input voltage, SATA_REFCLKP and
TBD
V
SATA_REFCLKN
High-level input voltage, RTC_XI
0.8*RTC_CVDD
V
High-level input voltage, OSCIN
0.8*CVDD
V
VIL
Low-level input voltage, Dual-voltage I/O, 3.3V(3)
Voltage
0.8
V
Input Low
Low-level input voltage, Dual-voltage I/O, 1.8V (3)
0.35*DVDD
V
Low-level input voltage, SATA_REFCLKP and
TBD
V
SATA_REFCLKN
(1)
The RTC provides an option for isolating the RTC_CVDD from the CVDD to reduce current leakage when the RTC is powered
independently. If these power supplies are not isolated (CTRL.SPLITPOWER=0), RTC_CVDD must be equal to or greater than CVDD.
If these power supplies are isolated (CTRL.SPLITPOWER=1), RTC_CVDD may be lower than CVDD.
(2)
When an external crystal is used oscillator (OSC_VSS, RTC_VSS) ground must be kept separate from other grounds and connected
directly to the crystal load capacitor ground. These pins are shorted to VSS on the device itself and should not be connected to VSS on
the circuit board. If a crystal is not used and the clock input is driven directly, then the oscillator VSS may be connected to board ground.
(3)
These IO specifications apply to the dual-voltage IOs only and do not apply to the DDR2/mDDR or SATA interfaces. DDR2/mDDR IOs
are 1.8V IOs and adhere to the JESD79-2A standard.
66
Device Operating Conditions
Copyright © 2010, Texas Instruments Incorporated
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