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ICS9220B データシート(PDF) 8 Page - Integrated Device Technology |
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ICS9220B データシート(HTML) 8 Page - Integrated Device Technology |
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8 / 16 page ![]() 1427A—01/26/10 ICS9220B Programmable Rambus TM XDRTMClock Generator 8 IDTTM Programmable RambusTM XDRTMClock Generator Operating Modes Device ID and SMBus Device Address The device ID (SMB_A(2:1)) is part of the SMBus device address. The least significant bit of the address designates a write or read operation. Table 3 shows the addresses for four ICS9220 devices on the same SMBus. Table 4: Operating Modes Byte 1 LX X X X Z Z HX 1 X X HL 0 X X H H 000 Z Z H H 001 Z CLK_INT/C H H 010 CLK_INT/C Z H H 011 CLK_INT/C CLK_INT/C Notes 1 Bypass Mode 2 Power up default mode CLK_INT/C Reserved for Vendor Test ODCLK_T/C1 ODCLK_T/C0 Byte 0 OE BYPASS#/ PLL Table 3. SMBus Device Addresses Device Control Function AS2 AS1 Wr#/Rd D8 0 D9 1 DA 0 DB 1 DC 0 DD 1 DE 0 DF 1 3 11011 0 1 0 1 0 0 1 Hex Address ICS 9220 Operation Read Write Read Write Write Read Write Read 0 1 2 8 bit SM Bus De vice Addre ss Including Oper. 1 |
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