Wolfson Microelectronics

11

WM0834, WM0838

WM0834 MUX Addressing

MUX Address

Channel Number

SGL/DIF

ODD/EVEN

Select bit

0

1

2

3

Differential MUX Mode (Between adjacent pairs of points)

00

0

+

-

00

1

+

-

01

0

-

+

01

1

-

+

Single Ended MUX Mode (between selected input(s) and AGND)

10

0

+

10

1

+

11

0

+

11

1

+

Note: Analogue common input 'COM' used with single ended mode is internally tied to AGND

All internal registers are cleared when CS is high. To

initiate another conversion, CS must make a high to low

transition and MUX address assignments input to DI.

The DI inpit and DO output can be tied together and

controlled via a bidirectional processor I/O bit line.

Reference Input

The analogue input voltage range Vmax to Vmin for

differential and pseudo-differential input is defined by the

voltage applied to the reference input with respect to

AGND.

WM0834/8 can be used in ratiometric appliacations or

those requiring absolute accuracy. A ratiometric input is

typically the Vcc and is the same supply used to power

analogue input circuitry and sensors. In such systems

under a given input condition, the same code will be

output with variations in supply voltage, because the same

ratio change occurs in both the analogue and reference

input to the A/D. When used in applications requiring ab-

solute accuracy, a suitable time and temperature stable

voltage reference source should be used.

The voltage source used to drive the reference input should

be capable of driving the 2.4k

Ω typical of the SAR resistor

ladder. The maximum input voltage to the reference input

is the Vcc supply voltage. The minimum can be as least

as low as 1V to allow for direct conversion of sensor

outputs with output voltage ranges less than 5V.

Analogue Inputs

While sampling the analogue inputs, short spikes of

current enter a "+" input and flow out of the corresponding

"-" input at the clock edges during conversion. This

current does not cause errors as it decays rapidly and the

internal comparator is strobed at the end of a clock period.

Care should be exercised if bypass capacitors are used at

the inputs as an apparant offset error can be caused by the

capacitor averaging the input current and developing a volt-

age across the source resistance. Bypass capacitors should

not be used with a source resistance greater than 1k

Ω.

In considering error sources, input leakage current will also

cause a voltage drop across the source resistance and

hence, high impedance sources should be buffered.

In differential mode, there is a 1/2 clock period interval

between sampling the "+" and the "-" inputs. If there is a

change in common mode voltage during this interval, an

errorcould notionally result.

For a sinusoidal common mode signal, the error is given

by:

VERROR = VPEAK (2

πfCM) (1/(2fCLK))

Where