Production Data

WM8725

WOLFSON MICROELECTRONICS LTD

PD Rev 2.0 July 2000

5

DEVICE DESCRIPTION

INTRODUCTION

WM8725 is a complete stereo audio 16-bit digital-to-analogue converter, including digital

interpolation filter, multibit sigma-delta with dither, and switched capacitor multibit stereo

DAC and output smoothing filters.

Special functions of mute and de-emphasis are provided, and operation using system clock

of 256fs or 384fs is provided, selection between either clock rate being automatically

controlled. Sample rates (fs) from less than 8ks/s to 96ks/s are allowed, provided the

appropriate system clock is input.

MUTE

DESCRIPTION

0

Mute is OFF

1

Mute is ON

Table 1 Mute Control

A novel multi bit sigma-delta DAC design is used, utilising a 64x oversampling rate, to

optimise signal to noise performance and offer increased clock jitter tolerance.

Internally generated midrail references are used to DC bias output signals, requiring only a

single external capacitor for decoupling purposes.

The device is packaged in a small 14-pin SOIC package, offering pin compatibility with Burr

Brown PCM1725, but with added functionality of a mute input pin, which may be left floating if

unused, or held ‘low’ leaving the device operational.

Single 3V to 5V supplies may be used, the output amplitude scaling with absolute supply

level. Low supply voltage operation and low current consumption, and the low pin count small

package, make the WM8725 attractive for many consumer type applications.

DAC CIRCUITS

The WM8725 DACs are designed to allow playback of 16-bit PCM audio or similar data with

high resolution and low noise and distortion. Sample rates up to 96ks/s may be used, with

much lower sample rates acceptable provided that the ratio of sample rate (LRCIN) to

system clock is maintained at the required 256fs or 384fs times.

The DACs on WM8725 are implemented using sigma-delta oversampled conversion

techniques. These require that the PCM samples are digitally filtered and interpolated to

generate a set of samples at a much higher rate than the 96ks/s input rate. This sample

stream is then digitally modulated to generate a digital pulse stream that is then converted to

analogue signals in a switched capacitor DAC. The advantage of this technique is that the

DAC is linearised using noise shaping techniques, allowing the 16 bit resolution to be met

using non-critical analogue components. A further advantage is that the high sample rate at

the DAC output means that smoothing filters on the output of the DAC need only have fairly

crude characteristics in order to remove the characteristic steps, or images, on the output of

the DAC. To ensure that generation of tones characteristic to sigma-delta convertors is not a

problem, dithering is used in the digital modulator and a higher order modulator is used. The

switched capacitor technique used in the DAC reduces sensitivity to clock jitter compared to

switched current techniques used in other implementations.

De-emphasis of 44.1kHz signals may be applied if required.

DEEMPH

DESCRIPTION

0

De-emphasis is OFF

1

De-emphasis is ON

Table 2 De-emphasis Control

The voltage on the CAP pin is used as the reference for the DACs, therefore the amplitude of the

signals at the DAC outputs will scale with the amplitude of the voltage at the CAP. An external

reference could be used to drive into the CAP pin if desired, but a value typically of about midrail

should be used for optimum performance.