When POL = L, odd numbered outputs (1, 3, 5, ...383) are

controlled by VGMA6 through VGMA10 and even numbered

outputs are controlled by VGMA1 through VGMA5. When

POL = H, odd numbered outputs are controlled by VGMA1

through VGMA5 and even numbered outputs are controlled

by VGMA6 through VGMA10.

RPI1/ RPI2 — REPAIR INPUT 1 AND 2 (INPUT)

The input signal for the repair line buffers. These buffers are

optional and when not used, the input should be tied to

ground. The pin can be tied to ground through a local pin on

the TCP, eliminating the need to bring the repair amp inputs

or outputs off the TCP.

RPO1/ RPO2 — REPAIR OUTPUT 1 AND 2 (OUTPUT)

The output of the repair line buffers. These outputs are

current buffered copies of their respective inputs.

UP — DATA SHIFT DIRECTION — UP OR DOWN (INPUT)

The UP pin controls the data shift direction. If UP is high then

data is shifted “up” from output 1 to output 384, ENIO1 is

configured as an input, and ENIO2 is an output. If UP is low

then data is shifted “down” from output 384 to output 1,

ENIO2 is an input, and ENIO1 is an output. The UP pin can

be tied either high or low through connection to a neighbor-

ing pin, eliminating the need to bring the pin off the package.

CSTIME — CHARGE SHARE TIME

The CSTIME pin allows the user to set the duration of

charge-sharing mode based on the panel capacitance and

resistance.

V

Positive supply voltage for the digital logic functions of the

driver.

V

Positive supply voltage for the analog functions of the driver.

V

The reference voltages to the upper and lower RDACs used

to control the inverse gamma transfer function of the driver.

Option - Any or all of the inputs V

V

V

Optional positive supply voltage that provides a constant

bias current to the output amplifiers to extend dynamic

range. When separately provided, V

greater than V

must be tied to V

held at or below V

V

Digital ground reference voltage.

V

Analog ground reference voltage.

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