X24022

5

BUS ACTIVITY:

MASTER

SDA LINE

BUS ACTIVITY:

X24022

S

T

A

R

T

SLAVE

ADDRESS

S

S

T

O

P

P

A

C

K

A

C

K

A

C

K

WORD

ADDRESS

DATA

Figure 4. Slave Address

DEVICE ADDRESSING

Following a start condition the master must output the

address of the slave it is accessing. The most significant

four bits of the slave address are the device type identifier

(see Figure 4). For the X24022 this is fixed as 1010[B].

The next three significant bits address a particular

device. A system could have up to eight X24022 devices

on the bus (see Figure 10). The eight addresses are

The last bit of the slave address defines the operation to

be performed. When set to one a read operation is

selected, when set to zero a write operation is selected.

Following the start condition, the X24022 monitors the

SDA bus comparing the slave address being transmit-

outputs an acknowledge on the SDA line. Depending on

the state of the R/

W bit, the X24022 will execute a read

or write operation.

WRITE OPERATIONS

Byte Write

For a write operation, the X24022 requires a second

address field. This address field is the word address,

comprised of eight bits, providing access to any one of

the 256 words of memory. Upon receipt of the word

address the X24022 responds with an acknowledge,

and awaits the next eight bits of data, again responding

with an acknowledge. The master then terminates the

transfer by generating a stop condition, at which time the

X24022 begins the internal write cycle to the nonvolatile

memory. While the internal write cycle is in progress the

X24022 inputs are disabled, and the device will not

respond to any requests from the master. Refer to

Figure 5 for the address, acknowledge and data transfer

sequence.

3848 FHD F09

Figure 5. Byte Write

3848 FHD F10

1

0

1

0

A2

A1

A0

R/W

DEVICE TYPE

IDENTIFIER

DEVICE

ADDRESS