X88064

6

TOGGLE BIT POLLING

Because the X88064 typical nonvolatile write cycle time

is less than the specified 5ms, Toggle Bit Polling has

been provided to determine the early completion of write.

from HIGH to LOW and LOW to HIGH on subsequent

attempts to read the device. When the internal cycle is

complete, the toggling will cease and the device will be

accessible for additional read or write operations.

Toggle Bit Polling RD/WR Control

Symbol Table

RD

LAST BYTE •

WRITTEN

CE

ALE

WR

AIN

D IN

OPERATION

AIN

DOUT

AIN

DOUT

AIN

DOUT

AIN

D OUT

AIN

ADDR

I/O6=X

X88064 READ Y FOR

NEXT OPERATION

7023 FRM F05

I/O6=X

I/O6=X

I/O6=X

A12=n

A12=n

A12=n

A12=n

A12=n

WAVEFORM

INPUTS

OUTPUTS

Must be

steady

Will be

steady

May change

from LOW

to HIGH

Will change

from LOW

to HIGH

May change

from HIGH

to LOW

Will change

from HIGH

to LOW

Don’t Care:

Changes

Allowed

Changing:

State Not

Known

N/A

Center Line

is High

Impedance