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CS8427-CSZ データシート(PDF) 26 Page - Cirrus Logic

部品番号 CS8427-CSZ
部品情報  96 kHz Digital Audio Interface Transceiver
PDF  60 Pages
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メーカー  CIRRUS [Cirrus Logic]
ホームページ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS8427-CSZ データシート(HTML) 26 Page - Cirrus Logic

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CS8427
26
DS477F5
mode is used for active-low, wired-OR hook-ups
with multiple peripherals connected to the micro-
controller interrupt input pin.
Many conditions can cause an interrupt, as listed in
the interrupt status register descriptions. Each
source may be masked off using mask register
bits. In addition, each source may be set to rising
edge, falling edge, or level-sensitive. Combined
with the option of level-sensitive or edge-sensitive
modes within the microcontroller, many different
set-ups are possible depending on the needs of
the equipment designer.
MA P
MSB
LSB
DATA
by te 1
by te n
R/W
R/W
AD D R E S S
CH IP
ADDRESS
CH IP
CD IN
CC L K
CS
CD OU T
MSB
LSB MSB
LSB
0010000
0010000
MAP = Memory Address Pointer, 8 bits, MSB first
High Impedance
Figure 17. Control Port Timing in SPI Mode
SDA
SCL
0010
AD2-0
R/W
Start
ACK DATA7-0 ACK DATA7-0 ACK
Stop
Note 2
Note 1
Note 1: AD2 is derived from a resistor attached to the EMPH pin,
Note 2: If operation is a write, this byte contains the Memory Address Pointer, MAP
AD1 and AD0 are determined by the state of the corresponding pins
Note 3: If operation is a read, the last bit of the read should be a NACK(high)
Note 3
Figure 18. Control Port Timing in I²C Mode



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