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PIC16F707-E/ML データシート(PDF) 89 Page - Microchip Technology

部品番号 PIC16F707-E/ML
部品情報  40/44-Pin, Flash Microcontrollers with nanoWatt XLP and mTouch??Technology
PDF  284 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F707-E/ML データシート(HTML) 89 Page - Microchip Technology

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 2010 Microchip Technology Inc.
Preliminary
DS41418A-page 89
PIC16F707/PIC16LF707
10.0 FIXED VOLTAGE REFERENCE
The Fixed Voltage Reference, or FVR, is a stable
voltage reference independent of VDD with 1.024V,
2.048V or 4.096V selectable output levels. The output
of the FVR can be configured to supply a reference
voltage to the following:
• ADC input channel
• ADC positive reference
• Digital-to-Analog Converter (DAC)
• Capacitive Sensing Modules (CSM)
The FVR can be enabled by setting the FVREN bit of
the FVRCON register.
10.1
Independent Gain Amplifiers
The output of the FVR supplied to the ADC and
CSM/DAC modules is routed through the two
independent programmable gain amplifiers. Each
amplifier can be configured to amplify the reference
voltage by 1x, 2x or 4x.
The ADFVR<1:0> bits of the FVRCON register are
used to enable and configure the gain amplifier settings
for the reference supplied to the ADC module. Refer-
ence Section 9.0 “Analog-to-Digital Converter
(ADC) Module” for additional information on selecting
the appropriate input channel.
The CDAFVR<1:0> bits of the FVRCON register are
used to enable and configure the gain amplifier settings
for the reference supplied to the capacitive sensing and
digital-to-analog
converter
modules.
Reference
Section 16.0 “Capacitive Sensing Module” and
Section 11.0 “Digital-to-Analog Converter (DAC)
Module” for additional information.
10.2
FVR Stabilization Period
When the Fixed Voltage Reference module is enabled, it
requires time for the reference and amplifier circuits to
stabilize. Once the circuits stabilize and are ready for
use, the FVRRDY bit of the FVRCON register will be set.
See Section 25.0 “Electrical Specifications” for the
minimum delay requirement.
FIGURE 10-1:
VOLTAGE REFERENCE BLOCK DIAGRAM
ADFVR<1:0>
CDAFVR<1:0>
X
1
X
2
X
4
X
1
X
2
X
4
2
2
FVR BUFFER1
(To ADC Module)
FVR BUFFER2
(To Cap Sense, DAC)
+
_
FVREN
FVRRDY
1.024V Fixed
Reference



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