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MB90F482B データシート(PDF) 38 Page - fujitsu semiconductor |
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MB90F482B データシート(HTML) 38 Page - fujitsu semiconductor |
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38 / 124 page  MB90480B/485B Series 38 DS07-13722-11E (2) Block Diagram MD1 MD0 CS2 CS1 CS0 SCKE SOE PEN P SBL CL A/D REC RXE TXE PE ORE FRE RDRF TDRE BDS RIE TIE F2MC-16LX BUS SIDR SODR SOT0 SCK0 Start bit detect circuit Receive bit counter Receiving parity counter Send start circuit Send bit counter Send parity counter SIN0 Control signal PPG1 (internal connection) External clock Clock select circuit Receiving status decision circuit μDMAC receiving error generation circuit (to CPU) Receiving clock Receiving control circuit Receiving shifter Receiving control circuit Sending clock Receiving interrupt (to CPU) Sending interrupt (to CPU) Sending control circuit Sending shifter Sending start SMR Control signal SCR SSR Proprietary baud rate generator |
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