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M95040 データシート(PDF) 38 Page - STMicroelectronics

部品番号 M95040
部品情報  4 Kbit, 2 Kbit and 1 Kbit serial SPI bus EEPROM with high-speed clock
PDF  43 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95040 データシート(HTML) 38 Page - STMicroelectronics

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Package mechanical data
M95040, M95020, M95010
38/43
Doc ID 6512 Rev 8
Figure 20.
UFDFPN8 (MLP8) — 8-lead ultra thin fine pitch dual flat package no lead
2 × 3mm, package outline
1.
Drawing is not to scale.
2.
The central pad (the area delimited by E2 and D2 in the above illustration) is internally pulled to VSS. It
should not be connected to any other voltage or signal line on the PCB, for example during the soldering
process.
Table 23.
UFDFPN8 (MLP8) — 8-lead ultra thin fine pitch dual flat package no lead
2 × 3mm, package mechanical data
Symbol
millimeters
inches(1)
1.
Values in inches are converted from mm and rounded to 4 decimal digits.
Typ
Min
Max
Typ
Min
Max
A
0.55
0.45
0.6
0.0217
0.0177
0.0236
A1
0.02
0
0.05
0.0008
0
0.002
b
0.25
0.2
0.3
0.0098
0.0079
0.0118
D
2
1.9
2.1
0.0787
0.0748
0.0827
D2
1.6
1.5
1.7
0.063
0.0591
0.0669
E
3
2.9
3.1
0.1181
0.1142
0.122
E2
0.2
0.1
0.3
0.0079
0.0039
0.0118
e
0.5
-
-
0.0197
-
-
L
0.45
0.4
0.5
0.0177
0.0157
0.0197
L1
0.15
0.0059
L3
0.3
0.0118
ddd(2)
2.
Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from
measuring.
0.08
0.08
D
E
UFDFPN-01
A
A1
ddd
L1
e
b
D2
L
E2
L3



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