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6402 データシート(PDF) 65 Page - Intel Corporation |
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6402 データシート(HTML) 65 Page - Intel Corporation |
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65 / 250 page ![]() Intel® 6400/6402 Advanced Memory Buffer Datasheet 65 Debug and Logic Analyzer Mode The signals will be driven or captured by four DDR I/O buffers. Figure 5-7. Event Bus Signal Timing P ulse EV Bus tim ing EVT A dditional pulses filtered out for period of at least 2 * EVT EVT Selected Local Event F iltered EV Bus Pulse O ut Received EV Bus S ignal Filtered EVBus Pulse In Local E vent Q ualifier Level E V B us tim ing Minim um P ulse = E V T Selected Local Event F iltered EV Bus Pulse O ut Received EV Bus S ignal Filtered EVBus Pulse In Local E vent Minimum P ulse = E V T |
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