AD9552PCBZ datasheet(30/32 Pages) AD

30 / 32 page

AD9552

Rev. C | Page 30 of 32

OUTLINE DIMENSIONS

COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2

0.30

0.23

0.18

0.20 REF

0.80 MAX

0.65 TYP

0.05 MAX

0.02 NOM

12° MAX

1.00

0.85

0.80

SEATING

PLANE

COPLANARITY

0.08

0.50

0.40

0.30

3.50 REF

0.50

BSC

PIN 1

INDICATOR

TOP

VIEW

5.00

BSC SQ

4.75

BSC SQ

3.25

3.10 SQ

2.95

PIN 1

INDICATOR

0.60 MAX

0.25 MIN

EXPOSED

PAD

(BOTTOM VIEW)

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

Figure 30. 32-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

5 mm × 5 mm Body, Very Thin Quad

(CP-32-2)

Dimensions shown in millimeters

ORDERING GUIDE

Model1

Temperature Range

Package Description

Package Option

AD9552BCPZ

−40°C to +85°C

32-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

CP-32-2

AD9552BCPZ-REEL7

−40°C to +85°C

32-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

CP-32-2

AD9552/PCBZ

Evaluation Board

1 Z = RoHS Compliant Part.

AD9552PCBZ データシート(PDF) 30 Page - Analog Devices

AD9552PCBZ データシート(HTML) 30 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

データシートダウンロード