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TLE7269G データシート(PDF) 5 Page - Infineon Technologies AG |
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TLE7269G データシート(HTML) 5 Page - Infineon Technologies AG |
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5 / 34 page ![]() Data Sheet 5 Rev. 1.2, 2007-11-13 TLE7269G Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Figure 2 Pin Configuration (top view) Note: The pin configuration of the TLE7269G is pin compatible to the devices TLE7259G and TLE7259-2GE/GU. In comparison to the TLE7259G and the TLE 7259-2GE/GU, no pull up resistors on the RxD pins are required for the TLE7269G. Details can be found inside the “Pin Compatibility to the Single LIN Transceivers” on Page 28. 3.2 Pin Definitions and Functions Table 1 Pin Definitions and Functions Pin No. Symbol Function 1 RxD1 Receive data output 1; LOW in dominant state, active LOW after a Wake-Up event at BUS1 or WK pin 2EN Enable input; integrated pull-down, device set to normal operation mode when HIGH 3WK Wake input; active LOW, negative edge triggered, internal pull-up 4TxD1 Transmit data input 1; integrated pull-down, LOW in dominant state; active LOW after Wake-Up via WK pin 5TxD2 Transmit data input 2; integrated pull-down, LOW in dominant state 6VIO Logic Voltage supply input; 3.3V or 5V supply for the RxD and TxD pins 7 RxD2 Receive data output 2; LOW in dominant state, active LOW after a Wake-Up event at BUS2 RxD1 1 2 3 4 5 6 78 EN WK TxD1 INH1 V S BUS1 GND TxD2 V IO RxD2 BUS2 W2O INH2 9 10 11 12 13 14 |
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