FX643 datasheet(4/14 Pages) CMLMICRO

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Call Progress Tone Detector

FX643

D/643/4

1.3

Signal List

Package

Signal

Description

Pin No.

Name

Type

XTAL/CLOCK

I/P

The external clock input to the clock divider

circuit. Also, the input to the on-chip oscillator,

for external Xtal circuit (D4 package only).

XTALN

O/P

The inverted output of the on-chip oscillator

(D4 package only).

DETECT3

O/P

When a single tone within the range of the Call

Progress Band or Non Call Progress Band, or a

Special Information Tone, is detected, this

output goes to a logic "1".

ENABLE

I/P

A logic "0" pulse of at least 1µs applied to this

input resets the decoder circuits and forces

DETECT1, DETECT2 and DETECT3 outputs to

a logic "0".

DETECT1

O/P

When a call progress signal is detected, this

output goes to a logic "1".

SIGIN

I/P

Signal input. Signals to this pin should be ac

coupled. The dc bias of this pin is set internally.

Vss

Power

The negative supply rail (ground).

DETECT2

O/P

This output is used in conjunction with

DETECT1.

When DETECT1 is at a logic "1", this output

goes to a logic "1" if a Call Progress High Band

signal is detected.

When DETECT1 is at a logic "0", this output

goes to a logic "1" if a Non Call Progress signal

is detected.

VDD

Power

The positive supply rail. This pin should be

decoupled to VSS by a capacitor.

1, 6, 8,

9, 11,

14, 16

Internal connection. Do not make any

connection to these pins.

Notes: I/P

Input

O/P

Output

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