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AP7165 データシート(PDF) 4 Page - Diodes Incorporated

部品番号 AP7165
部品情報  600mA LOW DROPOUT REGULATOR WITH POK
PDF  14 Pages
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メーカー  DIODES [Diodes Incorporated]
ホームページ  http://www.diodes.com
Logo DIODES - Diodes Incorporated

AP7165 データシート(HTML) 4 Page - Diodes Incorporated

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AP7165
600mA LOW DROPOUT REGULATOR WITH POK
AP7165
Document number: DS31270 Rev. 6 - 2
4 of 14
www.diodes.com
September 2010
© Diodes Incorporated
Electrical Characteristics
(TA = 25
oC, V
IN = VOUT +1V, CIN = 1µF, COUT = 10µF, VEN = VIN, unless otherwise stated)
Symbol
Parameter
Test Conditions
Min
Typ.
Max
Unit
IQ
Input Quiescent Current
IOUT = 0
125
170
µA
ISHDN
Input Shutdown Current
VEN = 0V, IOUT = 0 (Note 3)
-1
0.01
1
µA
VROPOUT
Dropout Voltage
VOUT ≥ 1.5V, IOU T = 500mA
300
400
mV
VREF
FB reference voltage
0.8
V
IFB
FB leakage
0.01
1
µA
VOUT
Output Voltage Total Accuracy
-2.5
2.5
%
OUT
IN
OUT
V
ΔV
ΔV
/
Line Regulation
VIN = VOUT +1V to 5.5V,
IOUT = 1mA
0.015
%/V
ΔV
OUT / VOUT
Load Regulation
IOUT from 1mA to 500mA
-1.0
1.0
%
tST
Start-up Time, from EN high to POK
high
VEN = 0V to 2.0V, IOUT =
100mA, VIN = 3.3V
170
µs
PSRR
Power Supply Rejection Ratio
1kHz, VIN = 3.3V, VOUT = 1.2V,
IOUT = 0mA
60
dB
ILIMIT
Current limit
VOUT = 1.8V, ROUT = 0.5Ω
600
950
mA
ISHORT
Short-circuit Current
VIN = 3.3V, VOUT < 0.2V
380
mA
VIL
EN Input Logic Low Voltage
0.4
V
VIH
EN Input Logic High Voltage
1.4
V
IEN
EN Input leakage
VEN = 0V or 5.5V
0.01
1
µA
VOL
POK output low voltage
Force 2mA
100
200
mV
VPOK_TH_UP
Output voltage (rising) POK threshold
FB (or OUT for fixed version)
rising
87%
92%
97%
Vref
VPOK Hys
Output voltage POK hysteresis
4%
Vref
POK deglitch
VIN = 3.3V, VOUT = 1.2V
150
µs
IPOK LK
POK leakage current
VPOK = 5.5V
0.01
1
µA
TSHDN
Thermal shutdown threshold
150
°C
THYS
Thermal shutdown hysteresis
25
°C
θJA
Thermal Resistance Junction-to-
Ambient
DFN3030-10 (Note 4)
40
oC/W
SOP-8L-EP (Note 5)
27
oC/W
θJC
Thermal Resistance
Junction-to- Case
DFN3030-10 (Note 4)
9
oC/W
SOP-8L-EP (Note 5)
4
oC/W
Notes:
3. POK pin must be disconnected from IN pin.
4. Test condition for DFN3030-10: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 6 vias to
bottom layer 1.0”x1.5” ground plane.
5. Test condition for SOP-8L-EP: Device mounted on 2" x 2" FR-4 substrate PCB, 2oz copper, with minimum recommended pad on top layer and
thermal vias to bottom layer ground plane.



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