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CYRF69103

Document #: 001-07611 Rev *F

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12.9 Source Indirect Post Increment

The result of an instruction using this addressing mode is placed

in the Accumulator. Operand 1 is an address pointing to a

location within the memory space, which contains an address

(the indirect address) for the source of the instruction. The

indirect address is incremented as part of the instruction

execution. This addressing mode is only valid on the MVI

instruction. The instruction using this addressing mode is two

bytes in length. Refer to the PSoC Designer: Assembly

Language User Guide for further details on MVI instruction.

Example

12.10 Destination Indirect Post Increment

The result of an instruction using this addressing mode is placed

within the memory space. Operand 1 is an address pointing to a

location within the memory space, which contains an address

(the indirect address) for the destination of the instruction. The

indirect address is incremented as part of the instruction

execution. The source for the instruction is the Accumulator. This

addressing mode is only valid on the MVI instruction. The

instruction using this addressing mode is two bytes in length.

Example

Table 12-9. Source Indirect Post Increment

Opcode

Operand 1

Instruction

Source Address Address

MVI

[8] In this case, the value in the memory

location at address 8 is an indirect

address. The memory location pointed to

by the indirect address is moved into the

Accumulator. The indirect address is then

incremented.

Table 12-10. Destination Indirect Post Increment

Opcode

Operand 1

Instruction

Destination Address Address

MVI

[8],

In this case, the value in the memory

location at address 8 is an indirect

address. The Accumulator is moved

into the memory location pointed to

by the indirect address. The indirect

address is then incremented.

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