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MIC3003GML データシート(PDF) 19 Page - Micrel Semiconductor

部品番号 MIC3003GML
部品情報  FOM Management IC with Internal Calibration
PDF  75 Pages
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メーカー  MICREL [Micrel Semiconductor]
ホームページ  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

MIC3003GML データシート(HTML) 19 Page - Micrel Semiconductor

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Micrel, Inc.
MIC3003
November 2009
19
M9999-111209-C
hbwhelp@micrel.com or (408) 955-1690
Channel
ADC Resolution
(bits)
Conditions
Input Range (V)
LSB
(1)
TEMP
8 or 9
N/A
1°C or 0.5°C
VAUX
8
See Table 6
GAIN = 0; BIASREF = 0
GNDA - VREF
GAIN = 0; BIASREF = 1
VDDA – (VDDA – VREF)
4.77mV
GAIN = 1; BIASREF = 0
GNDA - VREF/4
VMPD
8
GAIN = 1; BIASREF = 1
VDDA – (VDDA – VREF/4)
1.17mV
VILD- = VDDA
VDDA – (VDDA – VREF)
VILD
8
VILD- = GNDA
GNDA - VREF
4.77mV
VRX
12
RXPOT = 00
0 - VREF
0.298mV
Table 5. A/D Input Signal Ranges and Resolutions
Note:
1. Assumes typical VREF value of 1.22V.
Channel
VAUX [2:0]
Input Range (V)
LSB
(1) (mV)
VIN
000 = 00h
0.5V to 5.5V
25.6mV
VDDA
001 = 01h
0.5V to 5.5V
25.6mV
VBIAS
010 = 02h
0.5V to 5.5V
25.6mV
VMOD
011 = 03h
0.5V to 5.5V
25.6mV
APCDAC
100 = 04h
0V to VREF
4.77mV
MODDAC
101 = 05h
0V to VREF
4.77mV
FLTDAC
110 = 06h
0V to VREF
4.77mV
Table 6. VAUX Input Signal Ranges and Resolutions
Note:
1. Assumes typical VREF value of 1.22V.
Alarms and Warnings Interrupt Source Masking
Alarm and warning violations set the flags in the Alarm
and Warning Status Registers, and also assert the
interrupt output if they are not masked. If an alarm or
warning is masked, it will not set the interrupt. Table 8
shows the locations of the masking bits. The warning or
alarm is masked if the corresponding bit is set to 1.



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