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L6226Q データシート(PDF) 17 Page - STMicroelectronics

部品番号 L6226Q
部品情報  DMOS dual full bridge driver
PDF  29 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6226Q データシート(HTML) 17 Page - STMicroelectronics

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L6226Q
Application information
Doc ID 14335 Rev 5
17/29
5
Application information
A typical application using L6226Q is shown in Figure 14. Typical component values for the
application are shown in Table 8. A high quality ceramic capacitor in the range of 100 to 200
nF should be placed between the power pins (VSA and VSB) and ground near the L6226Q
to improve the high frequency filtering on the power supply and reduce high frequency
transients generated by the switching. The capacitors connected from the ENA/OCDA and
ENB/OCDB nodes to ground set the shut down time for the bridge A and bridge B
respectively when an over current is detected (see overcurrent protection). The two current
sources (SENSEA and SENSEB) should be connected to power ground with a trace length
as short as possible in the layout. To increase noise immunity, unused logic pins are best
connected to 5 V (high logic level) or GND (low logic level) (see pin description). It is
recommended to keep power ground and Signal Ground separated on PCB.
Table 8.
Component values for typical application
Component
Value
C1
100 nF
C2
100 µF
CBOOT
220 nF
CP
10 nF
CENA
5.6 nF
CENB
5.6 nF
CREF
68 nF
D1
1N4148
D2
1N4148
RCLA
5 k
Ω
RCLB
5 k
Ω
RENA
100 k
Ω
RENB
100 k
Ω



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