ATS685LSH datasheet(11/15 Pages) ALLEGRO

11 / 15 page

Two-Wire, Zero Speed

Differential Gear Tooth Sensor IC

ATS685LSH

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Start Mode Hysteresis

This feature helps to ensure optimal self-calibration by rejecting

electrical noise and low-amplitude target vibration during initial-

ization. This prevents AGC from calibrating the device on such

spurious signals. Calibration can be performed using the actual

target features.

A typical scenario is shown in figure 7. The hysteresis, POHYS,

is a minimum level of the peak-to-peak amplitude of the internal

analog electrical signal, VPROC, that must be exceeded before the

ATS685 starts to compute switchpoints.

RP(initial)

OP(initial)

Start Mode

Output Signal, ICC

If exceed PO

HYS

on high side

If exceed PO

HYS

on low side

IC Position

Relative to Target

Target Magnetic Profile

Differential Signal, VPROC

Target, Gear

Hysteresis, POHYS

Figure 7. Operation of Start Mode Hysteresis

• At power-on (position 1), the ATS685 begins sampling VPROC.

• At the point where the Start Mode Hysteresis, POHYS, is exceeded, the device establishes an initial switching threshold, by

using the Continuous Update algorithm. If VPROC is rising through the limit on the high side (position 2), the switchpoint is

BOP, and if VPROC is falling through the limit on the low side (position 4), it is BRP. After this point, Start Mode Hysteresis is

no longer a consideration. Note that a valid VPROC value exceeding the Start Mode Hysteresis can be generated either by a

legitimate target feature or by excessive vibration.

• In either case (BOP or BRP), because the switchpoint is immediately passed as soon as it is established, the ATS685 en-

ables switching:

▫ If on the high side, at BOP (position 2) the output would switch from low to high. However, because output is already high,

no output switching occurs.

At the next switchpoint, where BRP is passed (position 3), the output switches from high to low.

▫ If on the low side, at BRP (position 4) the output switches from high to low.

ATS685LSH データシート(PDF) 11 Page - Allegro MicroSystems

ATS685LSH データシート(HTML) 11 Page - Allegro MicroSystems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

データシートダウンロード