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ICS9220 データシート(PDF) 13 Page - Integrated Device Technology |
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ICS9220 データシート(HTML) 13 Page - Integrated Device Technology |
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13 / 17 page ![]() 13 ICS9220 1227G—11/05/07 R2 R3 RT ZCH R1 Measurement Differential Driver Point RT ZCH Measurement Point R2 R3 R1 Swing Current Control RRC VT VT VTS VTS ISET ODCLK_T ODCLK_C Figure 2. Example System Clock Driver Equivalent Circuit t F 80% V(t) 20% t R V H V L Figure 3. Input and Output Voltage Waveforms Vx,nom Vx+ Vx- ODCLK_T ODCLK_C Figure 4. Crossing-point Voltage Input Clock Signal The ICS9220 receives either a differential or single-ended reference clock (CLK_INT/C). When the reference input clock is from a differential clock source, it must meet the voltage levels and timing requirements listed in the DC Characteristics – Inputs and AC Characteristics – Inputs tables. For a singled-ended clock input, an external voltage divider and a supply voltage, as shown in Figure 2, provide a reference voltage VTH at the CLK_INC pin to determine the proper switching point for CLK_INT. The range of VTH is specified in the DC Characteristics – Inputs table. |
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