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ICS841S012DI データシート(PDF) 17 Page - Integrated Device Technology

部品番号 ICS841S012DI
部品情報  Crystal-to-0.7V Differential HCSL/LVCMOS Frequency Synthesizer
PDF  22 Pages
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メーカー  IDT [Integrated Device Technology]
ホームページ  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS841S012DI データシート(HTML) 17 Page - Integrated Device Technology

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ICS841S012DKI REVISION A JULY 20, 2009
17
©2009 Integrated Device Technology, Inc.
ICS841S012DI Data Sheet
CRYSTAL-TO-0.7V DIFFERENTIAL HCSL/LVCMOS FREQUENCY SYNTHESIZER
TABLE 7. THERMAL RESISTANCE
θθθθθ
JA FOR 56 LEAD VFQFN, FORCED CONVECTION
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability
of the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used.
Assuming 1 meter per second air flow and a multi-layer board, the appropriate value is 27.5°C/W per Table 7.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 1.396W * 27.5°C/W = 123.4°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air
flow, and the type of board (multi-layer).
θθθθθ
JA by Velocity (Meters per second)
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
31.4°C/W
27.5°C/W
24.6°C/W



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