ICS831721I datasheet(14/17 Pages) IDT

部品番号	ICS831721I

部品情報	Differential Clock/Data Multiplexer

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メーカー	IDT [Integrated Device Technology]

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ICS831721I Data Sheet

DIFFERENTIAL CLOCK/DATA MULTIPLEXER

ICS831721AGI REVISION A AUGUST 19, 2011

The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.

HCSL output driver circuit and termination are shown in

Figure 4.

Figure 4. HCSL Driver Circuit and Termination

HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation,

use the following equations which assume a 50

Ω load to ground.

The highest power dissipation occurs when VDD_MAX.

Power

= (VDD_MAX – VOUT) * IOUT,

since VOUT – IOUT * RL

= (VDD_MAX – IOUT * RL) * IOUT

= (3.6V – 17mA * 50

Ω) * 17mA

Total Power Dissipation per output pair = 46.8mW

VDD

VOUT

Ω

IOUT = 17mA

RREF =

475

Ω ± 1%

ICS831721I データシート(PDF) 14 Page - Integrated Device Technology