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ADP1048ARQZ-R7 データシート(PDF) 4 Page - Analog Devices |
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ADP1048ARQZ-R7 データシート(HTML) 4 Page - Analog Devices |
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4 / 84 page  ADP1047/ADP1048 Data Sheet Rev. 0 | Page 4 of 84 MIN_AC_PERIOD_SET Register ........................................... 69 MAX_AC_PERIOD_SET Register .......................................... 69 Current Loop Filter Gain for Low Line Input Register ......... 70 Current Loop Filter Zero for Low Line Input Register ......... 70 Current Loop Filter Gain for High Line Input Register........ 70 Current Loop Filter Zero for High Line Input Register ........ 70 Soft Start Set Register................................................................. 70 Inrush Set Register ..................................................................... 71 FAST_OVP_FAULT_RISE Register......................................... 71 FAST_OVP_FAULT_FALL Register........................................ 71 FAST OVP Debounce Time Setting Register ......................... 71 Low Power Mode Operation Threshold Register .................. 72 Power Metering Offset Trim for Low Line Input Register.... 72 Power Metering Gain Trim for Low Line Input Register...... 72 High Line Limit Register ........................................................... 72 Low Line Limit Register ............................................................ 72 ILIM_TRIM Register ................................................................. 72 Voltage Loop Output Register .................................................. 72 Exponent Register ...................................................................... 73 Read Update Rate Register ........................................................ 73 VIN Scale Monitor Register ...................................................... 73 IIN_GSENSE Register ............................................................... 73 CS Fast OCP Blank Register ..................................................... 74 CS Fast OCP Setting Register ................................................... 74 Temperature Hysteresis Register .............................................. 74 VAC ADC Gain Trim Register ................................................. 75 VFB ADC Gain Trim Register.................................................. 75 CS ADC Gain Trim for 500 mV Range Register.................... 75 IBAL Gain Register (ADP1048 Only) ..................................... 75 Smart VOUT Low Power Threshold (P1) Register ............... 75 Smart VOUT High Power Threshold (P2) Register .............. 75 Smart VOUT Low Line (VOL1) Register................................ 76 Smart VOUT Low Line (VOL2) Register................................ 76 Smart VOUT High Line (VOH1) Register ............................. 76 Smart VOUT High Line (VOH2) Register ............................. 76 Smart VOUT Upper Limit (VOH) Register ........................... 76 Smart VOUT Super High Line Register.................................. 76 SYNC Delay Register ................................................................. 76 SMART_VOUT_SUPER_HIGH_LINE_HYS Register........ 77 POWER_HYS Register.............................................................. 77 Advanced Feature Enable Register........................................... 77 VOUT_OV_FAULT_HYS Register ......................................... 77 VIN_UV_FAULT_HYS Register.............................................. 77 VAC ADC Offset Trim Register ............................................... 78 CS ADC Offset Trim for 500 mV Range Register ................. 78 CS ADC Gain Trim for High (750 mV) Range Register....... 78 CS ADC Offset Trim for High (750 mV) Range Register .... 78 Latched Flag Registers ............................................................... 78 PWM Value Register.................................................................. 79 VAC_LINE_PERIOD Register ................................................. 79 Read Temperature ADC Register............................................. 79 Power Metering Offset Trim for High Line Input Register .. 79 Power Metering Gain Trim for High Line Input Register .... 80 Current Loop Filter Gain for Low Line Input and Light Load Register .............................................................................. 80 Current Loop Filter Zero for Low Line Input and Light Load Register .............................................................................. 80 Current Loop Filter Gain for High Line Input and Light Load Register .............................................................................. 80 Current Loop Filter Zero for High Line Input and Light Load Register .............................................................................. 80 Smart VOUT Power Reading Register .................................... 80 IBAL Configuration Register (ADP1048 Only)..................... 81 Debug Flag Registers.................................................................. 81 Outline Dimensions ....................................................................... 83 Ordering Guide .......................................................................... 83 REVISION HISTORY 9/11—Revision 0: Initial Version |
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