SP8527DS/01

SP8527 Micropower Sampling 10-Bit A/D Converter

© Copyright 2000 Sipex Corporation

6

Single Ended or Full

Differential Operation

The SP8527 has a balanced full differential front

end. The SP8527 can be used in this manner, or

it can be used in single-ended circuits as well.

For single-ended systems, simply tie the -IN to

the Reference Low of the input signal, which is

allowed to range from 0V to V

differential sampling configuration, both inputs

are sampled and held simultaneously. Because

of the balanced differential sampling, dynamic

common mode noise riding along the input

signal is cancelled above and beyond DC noise.

This is a significant improvement over psuedo-

differential sampling schemes, where the low

side of the input must remain constant during

the conversion, and therefore only DC noise (i.e.

signal offset) is cancelled. If AC common mode

noise is left to be converted along with the

differental component, the output signal will be

degraded.

Full differential sampling allows flexibility in

converting the input signal. If the signal low- side

is already tied to a ground elsewhere in the

system, it can be hardwired to the low side

input (i.e., -IN) which acts as a signal ground

sense, breaking a potential ground loop. It is also

possible to drive the inputs balanced differential,

as long as both inputs are within the power rails.

In this configuration, both the high and low

signals have the same impedance looking back

to ground, and therefore pick up the same noise

along the physical path from signal source (i.e.,

sensor, transducer, battery) to the converter. This

noise becomes common mode, and is cancelled

out by the differential sampling of the SP8527.

Layout Considerations

To preserve the high resolution and linearity of

the SP8527 attention must be given to circuit

board layout, ground impedance and bypassing.

A circuit board layout which includes separate

analog and digital ground planes will prevent

the coupling of noise into sensitive converter

circuits and will help to preserve the dynamic

performance of the device. In single ended

mode, the analog input signal should be

referenced to the ground pin of the converter.

This prevents any voltage drops that occur in

the power supply's common return from appearing

in series with the input signal.

In full differential mode, the high and low side

board traces should run close to each other, with

the same layout. This will insure that any noise

coupling will be common mode, and cancelled

by the converters (patent pending) full differential

architecture.

If separate analog and digital ground planes are

not possible, care should be used to prevent

coupling between analog and digital signals. If

analog and digital lines must cross, they should

do so at right angles. Parallel analog and digital

lines should be separated by a circuit board trace

which is connected to common.

The reference pin on the SP8527 should be kept

as clean as possible. A noise signal of 4.88mV

(for VREF = 5.0V) will produce 1 lsb of error

in the output code. For convenience, the VREF

pin can be tied to the VCC pin, but now the same

care should be taken with the VCC pin as with

the VREF pin. Whether or not VCC is tied to

VREF, the VCC pin should always be bypassed

to the GROUND pin with a parallel combination

of a 6.8

µF tantalum and a 0.1µF ceramic

capacitor. To maintain maximum system

accuracy, the supply connected to the VCC pin

should be well isolated from digital supplies and

wide load variations. A separate conductor from

the supply regulator to the A/D converter will

limit the effects of digital switching elsewhere

in the system. Power supply noise can degrade

the converters performance. Especially corrupting

are noise and spikes from a switching

power supply.

To avoid introducing distortion when driving the

A/D converter input, the input signal source

should be able to charge the SP8527's equivalent

20 pF of input capacitance from zero volts to

the signal level in 1.5 clock periods.