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SP8537 データシート(PDF) 5 Page - Sipex Corporation |
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SP8537 データシート(HTML) 5 Page - Sipex Corporation |
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5 / 12 page ![]() 5 SP8537DS/03 SP8537 Micropower Sampling 10–Bit Voltage A/D Converter © Copyright 2000 Sipex Corporation The device uses a capacitive DAC architecture which provides the sampling behavior. This results in full Nyquist performance at the fastest throughput rate (29.5 KHz) the device is capable of. The power supply voltage is variable from 3.0V to 5.5V which provides supply flexibility. At the 5.0V supply level, conversion plus sampling time is 33.9 µS and supply current is 250µA (1.25 mW). With a 3.3V supply the conversion plus sampling time is 150.2 µS and current is reduced to 150 µA (0.5 mW). The device features automatic shutdown and will shutdown to a +0.5 µA power level as CS is brought high (de-selected). Power is proportional to conversion duty cycle and varies from 250 µA at 34µS (Duty cycle = 100%) to 6.25 µa at 1.4 ms (Duty cycle = 2.5%). Examples: Conversion rate I CC @ 5V Duty Cycle 34 µS 250 µA 100% 68 µS 125 µA 50% 136 µS 62.5 µA 25% 1.4 mS 6.25 µA 2.5% DESCRIPTION The SP8537 is a 10 bit sampling ADC with a programmable two channel multiplexer and serial data interface. The ADC samples and converts 10 bits of data in 33.9 µS with a 5V supply voltage applied. The SP8537 will also operate at a 3.3V supply at 150.2 µS throughput. The device automatically shuts down to a +0.5 µA (MAX) level as soon as the chip is deselected (CS=1). Serial data output is available in an MSB first format. FEATURES Two program bits, which are shifted into the device prior to conversion, determine the input configuration. In the single ended MUX configuration the input signal will be applied to either channel 0 or channel 1 and will be ground referenced. The maximum full scale range is VCC. In the full differential mode, the signal will be applied between channel 0 and channel 1. The signals applied at each input may both be dynamic. This is in contrast with pseudo differential devices which must have input low held at a constant level during conversion. The converter will provide significant common mode rejection when used in full differential manner. Both inputs must remain between ground and VCC for proper conversion. MUX ADDRESSING Mux Addressing Channel # GND Comments SGL/DIFF ODD/SIGN 0 1 0 0 V INH V INL Full Differential Mode 0 1 V INL V INH 1 0 V INH Single Ended Mux Mode 1 1 V INH INPUT VOLTAGE INPUT VOLTAGE OUTPUT (V INH-VINL)* AT V CC/VREF = 5V CODE 0 LSB 0V 0000000000 1 LSB 0.0049V 0000000001 512 LSB 2.5000V 1000000000 1022 LSB 4.9902V 1111111110 1023 LSB 4.9951V 1111111111 * See Mux Addressing Table for a definition of V INH - VINL. ADC TRANSFER FUNCTION V INL V INL |
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