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34063AD データシート(PDF) 2 Page - System Logic Semiconductor

部品番号 34063AD
部品情報  DC-TO-DC CONVERTER CONTROL CIRCUITS
PDF  2 Pages
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メーカー  SLS [System Logic Semiconductor]
ホームページ  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

34063AD データシート(HTML) 2 Page - System Logic Semiconductor

  34063AD Datasheet HTML 1Page - System Logic Semiconductor 34063AD Datasheet HTML 2Page - System Logic Semiconductor  
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System Logic
Semiconductor
SLS
SL34063A
ORDERING INFORMATION
Device
Temperature Range Package
34063AD 0° to +70°C
SO-8
34063AP1
Plastic DIP
ELECTRICAL CHARACTERICISTICS
(VCC = 5.0 V, TA= 0 to +70
oC unless otherwise specified.)
Characteristics
Symbol
Min
Typ
Max
Unit
OSCILLATOR
Frequency (VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C)
fosc
24
33
42
kHz
Charge Current (VCC = 5.0 V to 40 V, TA = 25°C)
Ichg
24
33
42
µA
Discharge Current (VCC = 5.0 V to 40 V, TA = 25°C)
Idischg
140
200
260
µA
Discharge to Charge Current Ratio (Pin7 to Vcc, TA=25°C) Idischg/Ichg 5.2
6.2
7.5
Current Limit Sense Voltage (Ichg = Idischg, TA = 25°C)
Vlpk(sense) 250
300
350
mV
OUTPUT SWITCH (Note 3)
Saturation Voltage, Darlington Connection (ISW = 1.0 A,
Pins 1, 8 connected)
VCE(sat)
1.0
1.3
V
Saturation Voltage (ISW = 1.0 A, RPin 8 = 82
Ω to V
CC.
Forced
β = 20)
VCE(sat)
0.45
0.7
V
DC Current Gain (ISW = 1.0 A, VCE
= 5.0 V, T
A = 25°C)
hFE
50
120
Collector Off-State Current (VCE = 40V)
IC(off)
0.01
100
µA
COMPARATOR
Threshold Voltage (TA = 25°C)
(TA = TLOW to THIGH)
Vth
1.225
1.21
1.25
1.275
1.29
V
Threshold Voltage (TA = 25°C) **
Vth
1.2375
1.25
1.2625
V
Threshold Voltage Line Regulation (VCC = 3 0 V to 40 V)
Regime
1.4
5.0
mV
Input Bias Current (Vin=0V)
IIB
-40
-400
nA
TOTAL DEVICE
Supply Current (VCC = 5 0 V to 40 V, CT = 1 0 nF, Vpin7 = VCC.
VPin5 > Vth, Pin 2 = Gnd, Remaining pins open)
ICC
2.5
4.0
mA
NOTES:
1. Maximum package power dissipation limits must be observed.
2.Low duty cycle pulse techniques are used during test to maintain Junction temperature as close to ambient temperature as
possible
3.If the output switch is driven into hard saturation (non Darlington configuration) at low switch currents (< 300 mA) and high
driver currents (>30 mA), it may take up to 2.0
µs to come out of saturation This condition will shorten the off' time at
frequencies > 30 kHz, and is magnified at high temperatures This condition does not occur with a Darlingto n configuration,
since the output switch cannot saturate If a non Darlington configuration is used, the following output drive condition is
recommended
Forced
β of output switch = I
C, output/(Ic, driver -7.0 mA*) > 10
*The 100
Ω. resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts
**Possible version for shipment
Pin connection



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