TMP100−EP, TMP101−EP

DIGITAL TEMPERATURE SENSOR

SGLS254A − JULY 2005 - REVISED APRIL 2010

5

POST OFFICE BOX 655303

pointer register

Figure 3 shows the internal register structure of the TMP100 and TMP101. The 8-bit pointer register of the

TMP100 and TMP101 is used to address a given data register. The pointer register uses the two LSBs to identify

which of the data registers should respond to a read or write command. Table 1 identifies the bits of the pointer

register byte. Table 2 describes the pointer address of the registers available in the TMP100 and TMP101.

Power-up reset value of P1/P0 is 00.

I/O

Control

Interface

SCL

SDA

Pointer

Register

Temperature

Register

Configuration

Register

Register

Register

Figure 3. Internal Register Structure of TMP100 and TMP101

P7

P6

P5

P4

P3

P2

P1

P0

0

0

0

0

0

0

Register Bits

Table 1. Pointer Register Byte

P1

P0

REGISTER

0

0

Temperature Register (READ Only)

0

1

Configuration Register (READ/WRITE)

1

0

1

1

Table 2. Pointer Addresses of the TMP100 Registers