データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

STULPI01A データシート(PDF) 35 Page - STMicroelectronics

部品番号 STULPI01A
部品情報  High-speed USB On-The-Go ULPI transceiver
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STULPI01A データシート(HTML) 35 Page - STMicroelectronics

Back Button STULPI01A_12 Datasheet HTML 31Page - STMicroelectronics STULPI01A_12 Datasheet HTML 32Page - STMicroelectronics STULPI01A_12 Datasheet HTML 33Page - STMicroelectronics STULPI01A_12 Datasheet HTML 34Page - STMicroelectronics STULPI01A_12 Datasheet HTML 35Page - STMicroelectronics STULPI01A_12 Datasheet HTML 36Page - STMicroelectronics STULPI01A_12 Datasheet HTML 37Page - STMicroelectronics STULPI01A_12 Datasheet HTML 38Page - STMicroelectronics STULPI01A_12 Datasheet HTML 39Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 35 / 44 page
background image
STULPI01A, STULPI01B
ULPI registers
Doc ID 14817 Rev 4
35/44
Note:
0Dh-0Fh(Read), 0Dh(Write), 0Eh(Set), 0Fh(Clear).
If set, the bits in this register cause an interrupt event notification to be generated when the
corresponding PHY signal changes from low to high. By default, all transitions are enabled.
RxActive and RxError must always be communicated immediately and so are not included
in this register. Interrupt circuitry can be powered down in any mode when both rising and
falling edge enables are disabled. To ensure interrupts are detectable when clock is
powered down, the link should enable both rising and falling edges.
Table 20.
USB interrupt enable rising register
Field name
Bits
Access
Reset
Description
Host disconnect rise
0
rd/wr/s/c
1b
Generates an interrupt event notification when host
disconnect changes from low to high. Applicable only in
Host mode (DpPulldown and DmPulldown both set to
1b).
VbusValid rise
1
rd/wr/s/c
1b
Generates an interrupt event notification when
VbusValid changes from low to high.
SessValid rise
2
rd/wr/s/c
1b
Generates an interrupt event notification when
SessValid changes from low to high. SessValid is the
same as UTMI+AValid.
SessEnd rise
3
rd/wr/s/c
1b
Generates an interrupt event notification when SessEnd
changes from low to high.
ID rise
4
rd/wr/s/c
1b
Generates an interrupt event notification when ID
changes from low to high. ID is valid 50 ms after
IdPullup is set to 1b, otherwise ID is undefined and
should be ignored.
Reserved
7:5
rd/wr/s/c
0b
Reserved.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com