STA333W datasheet(16/49 Pages) STMICROELECTRONICS

部品番号	STA333W

部品情報	2-channel high-efficiency digital audio system Sound Terminal?

PDF	49 Pages

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メーカー	STMICROELECTRONICS [STMicroelectronics]

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16 / 49 page

Functional description

STA333W

16/49

Doc ID 13365 Rev 2

Functional description

4.1

Functional pins

4.1.1

Power-down function

Pin PWRDN (23) is used to power down the STA333W.

PWRDN = 0 (0 V): power-down state.

PWRND = 1 (VDD): normal operation.

During the power-down sequence the output begins to mute. After the mute condition is

reached the power stage is switched off and the output becomes high impedance. Then the

master clock to all internal hardware blocks is gated off. The PLL is also switched off. The

complete power-down sequence takes 13 million cycles.

4.1.2

Reset function

Pin RESET (31) is used to reset the STA333W.

RESET = 0 (0 V): reset state.

RESET = 1 (VDD): normal operation.

When pin RESET is forced to 0 the power stage is switched off (with high-impedance

output) and the master clock to all internal hardware blocks is gated off.

Note:

Reset has a higher priority than power down.

STA333W データシート(PDF) 16 Page - STMicroelectronics