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WM8960CGEFL/V データシート(PDF) 13 Page - Wolfson Microelectronics plc

部品番号 WM8960CGEFL/V
部品情報  Stereo CODEC with 1W Stereo Class D Speaker Drivers and Headphone Drivers for Portable Audio Applications
PDF  91 Pages
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メーカー  WOLFSON [Wolfson Microelectronics plc]
ホームページ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8960CGEFL/V データシート(HTML) 13 Page - Wolfson Microelectronics plc

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Production Data
WM8960
w
PD, October 2011, Rev 4.1
13
SIGNAL TIMING REQUIREMENTS
SYSTEM CLOCK TIMING
Figure 2 System Clock Timing Requirements
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=SPKVDD1=SPKVDD2=3.3V, DGND=AGND=SPKGND1=SPKGND2=0V, TA = +25
oC
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNIT
System Clock Timing Information
MCLK cycle time
TMCLKY
33.33
ns
MCLK duty cycle
TMCLKDS
60:40
40:60
AUDIO INTERFACE TIMING – MASTER MODE
Figure 2 Digital Audio Data Timing – Master Mode (see Control Interface)
MCLK
tMCLKY



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