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WM8980CGEFL/V データシート(PDF) 37 Page - Wolfson Microelectronics plc

部品番号 WM8980CGEFL/V
部品情報  Stereo CODEC with Speaker Driver and Video Buffer
PDF  123 Pages
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メーカー  WOLFSON [Wolfson Microelectronics plc]
ホームページ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8980CGEFL/V データシート(HTML) 37 Page - Wolfson Microelectronics plc

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Pre-Production
WM8980
w
PP, Rev 3.8, May 2012
37
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Per
step
Per
6dB
90% of
range
0000
22.7us
182us
1.31ms
0001
45.4us
363us
2.62ms
0010
90.8us
726us
5.23ms
… (time doubles with every step)
1010
or
higher
23.2ms
186ms
1.34s
Table 18 ALC Control Registers
WHEN THE ALC IS DISABLED, THE INPUT PGA REMAINS AT THE LAST CONTROLLED VALUE
OF THE ALC. AN INPUT GAIN UPDATE MUST BE MADE BY WRITING TO THE INPPGAVOLL/R
REGISTER BITS.
NORMAL MODE
In normal mode, the ALC will attempt to maintain a constant signal level by increasing or decreasing
the gain of the PGA. The following diagram shows an example of this.
Figure 17 ALC Normal Mode Operation



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