AD608

REV. B

–5–

800mV/DIV

1V /DIV

100ns/DIV

100ns/DIV

Figure 9. RSSI Power-Up Response

IFHI

VPOS

RSSI

IF TEST BOARD

10.7 MHz

FLUKE 6082A

SYNTHESIZER

DCPS

3V

HP3366A

FET

PROBE

TEK P6201

PRUP

TRIGGER

CH 1

CH 2

HP54120A

DIGITAL

OSCILLOSCOPE

0dBm

Figure 10. Test Circuit for RSSI Power-Up Response

(Figure 9)

800mV/DIV

50ns/DIV

200mV/DIV

Figure 11. RSSI Pulse Response/RSSI Rise Time

IFHI

VPOS

RSSI

IF TEST BOARD

10.7 MHz

FLUKE 6082A

SYNTHESIZER

DCPS

3V

HP3366A

FET

PROBE

TEK P6201

CH 1

CH 2

HP54120A

DIGITAL

OSCILLOSCOPE

0dBm

COUPLER

MCL

ZDC-20-1

Figure 12. Test Circuit for RSSI Pulse Response/RSSI Rise

Time (Figure 11)

60mV/DIV

20ns/DIV

Figure 13. Limiter Rise and Fall Times

IFHI

VPOS

LMOP

IF TEST BOARD

10.7 MHz

FLUKE 6082A

SYNTHESIZER

DCPS

3V

HP3366A

FET

PROBE

TEK P6201

HP54120A

0dBm

DIGITAL

OSCILLOSCOPE

Figure 14. Test Circuit for Limiter Rise and Fall Times

(Figure 13)

100ns/DIV

1V/DIV

220mV/DIV

100ns/DIV

Figure 15. Limiter Power-Up Response Time

IFHI

VPOS

LMOP

IF TEST BOARD

10.7 MHz

FLUKE 6082A

SYNTHESIZER

3V

HP6633A

FET

PROBE

TEK P6201

PRUP

TRIGGER

CH 1

CH 2

HP54120A

DIGITAL

OSCILLOSCOPE

0dBm

DCPS

Figure 16. Test Circuit for Limiter Power-Up Response

Time (Figure 15)