AD8307

–18–

REV. A

The intercept can be raised, for example, to 100

µV, with the

rationale that the dc precision does not warrant operation in the

first decade (from 10

µV–100 µV). Likewise, the slope can be

raised to 50 mV/dB, using R7 = 3 k

Ω, R8 = 2 kΩ, or to 100 mV/

dB, to simplify decibel measurements on a DVM, using R7 =

8k

Ω, R8 = 2 kΩ, which raises the maximum output to +11 V,

thus requiring a +15 V supply for the AD830. The output may

be made to swing in a negative direction by simply reversing

Pins 1 and 2. Low-pass filtering capacitor C3 sets the output

rise time to about 1 ms.

6.0

10

100

1m

10m

100m

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

10

1

1.0

0.5

0

–0.5

–1.0

Figure 44. Ideal Output and Law-Conformance Error for

the DC-Coupled AD8307 at 50 mV/dB

Figure 44 shows the output and the law-conformance error in

the absence of noise and input offset, for the 50 mV/dB option.

Note in passing that the error ripple for dc excitation is about

twice that for the more usual sinusoidal excitation. In practice,

both the noise and the internal offset voltage will degrade the

accuracy in the first decade of the dynamic range. The latter is

now manually nulled, by VR1, using a simple method that en-

sures very low residual offsets.

A temporary ac signal, typically a sine wave of 100 mV in ampli-

tude at a frequency of about 100 Hz, is applied via the capacitor

at node TEMP; this has the effect of disturbing the offset-nulling

voltage. The output voltage is then viewed on an oscilloscope

and VR1 is adjusted until the peaks of the (frequency-doubled)

waveform are exactly equal in amplitude. This procedure can

provide an input null down to about 10

µV; the temperature

drift is very low, though not specified since the AD8307 is not

principally designed to operate as a baseband log amp, and in ac

modes this offset is continuously and automatically nulled.

Next, it is necessary to set the intercept. This is the purpose of

VR2, which should be adjusted after VR1. The simplest method

is to short the input and adjust VR2 for an output of 0.3 V,

corresponding to the noise floor. For more exacting applica-

tions, a temporary sinusoidal test voltage of 1 mV in amplitude,

at about 1 MHz, should be applied, which may require the use

of a temporary onboard input attenuator. For 20 mV/dB scaling,

a 10

µV dc intercept (which is 6 dB below the ac intercept)

requires adjusting the output to 0.68 V; for the 100 mV/dB

scaling, this becomes 3.4 V. If a 100

µV intercept is preferred

(usefully lowering the maximum output voltage), these become

0.28 V and 1.4 V respectively.

Finally, the slope must be adjusted. This can be performed by

applying a low frequency square wave to the main input, having

precisely determined upper and lower voltage levels, provided

by a programmable waveform generator. A suitable choice is a

100 Hz square wave with levels of 10 mV and 1 V. The output

will be a low-pass filtered square wave, and its amplitude should

be 0.8 V, for 20 mV/dB scaling, or 4 V for 100 mV/dB scaling.

Operation Above 500 MHz

The AD8307 is not intended for use above 500 MHz. However,

it does provide useful performance at higher frequencies.

Figure 45 shows a plot of the logarithmic output of the AD8307

for an input frequency of 900 MHz. The device shows good

logarithmic conformance from –50 dBm to –10 dBm. There is a

“bump” in the transfer function at –5 dBm, but if this is accept-

able, the device is usable over a 60 dB dynamic range (–50 dBm

to +10 dBm).

2

1.8

0

–60

–40

–20

0

1.6

1.4

1.2

0.2

–50

–30

–10

10

0.4

0.6

0.8

1

Figure 45. Output vs. Input Level for a 900 MHz Input Signal

Evaluation Board

An evaluation board, carefully laid out and tested to demon-

strate the specified high speed performance of the AD8307 is

available. Figure 46 shows the schematic of the evaluation board.

For ordering information, please refer to the Ordering Guide.

Figures 47 and 49 show the component-side and solder-side

silkscreens of the evaluation board. The component-side and

solder-side layouts are shown in Figures 48 and 50.

For connection to external instruments, side-launched SMA

type connectors are provided. Space is also provided on the

board for the installation of SMB or SMC type connectors.

When using the top-mount SMA connector, it is recommended

that the stripline on the outside 1/8" of the board edge be re-

moved (i.e., scraped using a blade) as this unused stripline acts

as an open stub, which could degrade the overall performance of

the evaluation board/device combination at high frequencies.