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AD9433/PCB データシート(PDF) 5 Page - Analog Devices

部品番号 AD9433/PCB
部品情報  12-Bit, 105 MSPS/125 MSPS IF Sampling A/D Converter
PDF  24 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9433/PCB データシート(HTML) 5 Page - Analog Devices

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REV. 0
AD9433
–5–
PIN FUNCTION DESCRIPTIONS
Pin Number
Mnemonic
Function
1, 3, 4, 9, 11, 33, 34, 35, 38, 39, 40,
GND
Analog Ground
43, 48, 51
2, 5, 6, 10, 36, 37, 44, 47, 52
VCC
Analog Supply (5 V)
7
ENCODE
Encode Clock for ADC-Complementary
8
ENCODE
Encode Clock for ADC-True (ADC samples on rising edge of
ENCODE)
14
OR
Out of Range Output
15–20, 25–30
D11–D0
Digital Output
13, 22, 23, 32
VDD
Digital Output Power Supply (3 V)
12, 21, 24, 31
DGND
Digital Output Ground
41
DFS
Data Format Select. Low = Two’s Complement, High = Binary;
Floats Low
42
SFDR MODE
CMOS control pin that enables (SFDR MODE = 1), a proprietary
circuit that may improve the spurious free dynamic range (SFDR)
performance of the AD9433. It is useful in applications where the
dynamic range of the system is limited by discrete spurious
frequency content caused by nonlinearities in the ADC transfer
function. SFDR MODE = 0 for normal operation; Floats Low.
45
VREFIN
Reference Input for ADC (2.5 V typical)
46
VREFOUT
Internal Reference Output (2.5 V typical); bypass with 0.1
µF to
Ground
49
AIN
Analog Input-True
50
AIN
Analog Input-Complement
PIN CONFIGURATION
52 51 50 49 48
43 42 41 40
47 46 45 44
14 15 16 17 18 19 20 21 22 23 24 25 26
1
2
3
4
5
6
7
8
9
10
11
13
12
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
39
38
37
36
35
34
33
32
31
30
29
28
27
AD9433BSQ
GND
VCC
GND
GND
VCC
VCC
ENCODE
ENCODE
GND
VCC
GND
DGND
VDD
GND
GND
VCC
VCC
GND
GND
GND
VDD
DGND
D0 (LSB)
D1
D2
D3



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