| データシートサーチシステム |
|
ADM809-5LART データシート(PDF) 3 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADM809-5LART データシート(HTML) 3 Page - Analog Devices |
|
3 / 6 page ![]() ADM809-5S/L –3– REV. 0 PIN FUNCTION DESCRIPTION Pin Mnemonic Function 1 GND 0 V. Ground reference for all signals. 2 RESET Active Low Logic Output. RESET remains low while VCC is below the reset threshold, and remains low for 55 ms (typ) after VCC rises above the reset threshold 3VCC Supply voltage being monitored. PIN CONFIGURATION 1 2 TOP VIEW (Not to Scale) ADM809- 5S/L GND 3 RESET VCC VCC RESET t1 t1 VREF VREF VREF VREF t1 = RESET TIME = 55ms TYP. VREF = RESET VOLTAGE THRESHOLD Figure 2. Power Fail Reset Timing Table I. RESET Threshold Options RESET Model Threshold ADM809-5LART 4.63 V ADM809-5SART 2.93 V ORDERING GUIDE Reset Temperature Branding Model Threshold Range Information Quantity ADM809-5LART-REEL 4.63 V –40 °C to +150°C M9L 10K ADM809-5LART-REEL-7 4.63 V –40 °C to +150°C M9L 3K ADM809-5SART-REEL 2.93 V –40 °C to +150°C M9S 10K ADM809-5SART-REEL-7 2.93 V –40 °C to +150°C M9S 3K ADM809-5SCHIPS 2.93 V –40 °C to +150°C NA 1 Wafer |
|
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |