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LMP91051MT/NOPB データシート(PDF) 6 Page - Texas Instruments

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部品番号 LMP91051MT/NOPB
部品情報  Configurable AFE for Nondispersive Infrared (NDIR) Sensing Applications
PDF  23 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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LMP91051MT/NOPB データシート(HTML) 6 Page - Texas Instruments

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LMP91051
SNAS581A – MARCH 2012 – REVISED NOVEMBER 2012
www.ti.com
Electrical Characteristics
(1)
The following specifications apply for VDD = 3.3V, VIO = 3.3V, VCM = 1.15V, Bold values for TA = -40°C to +85°C unless
otherwise specified. All other limits apply to TA = TJ = +25°C.
Min
Typ
Max
Symbol
Parameter
Conditions
Units
(2)
(3)
(2)
Power Supply
VDD
Supply Voltage
2.7
3.3
5.5
V
VIO
Digital I/O supply
2.7
3.3
5.5
V
IDD
Supply Current
All analog block ON
3.1
3.6
4.2
mA
Power Down Supply Current
All analog block OFF
45
75
121
μA
Digital Supply Current
8
μA
Offset Cancellation (Offset DAC)
Resolution
256
steps
LSB
All gains
33.8
mV
DNL
−1
+2
LSB
Error
Output referred offset error, all gains
±100
mV
VDD
−
Offset adjust range
Output referred, all gains
0.2
V
0.2
DAC settling time
480
μs
Programmable Gain Amplifier (PGA) 1st Stage, RL = 10kΩ, CL = 15pF
IBIAS
Bias Current
50
200
pA
VINMAX
Max input signal High gain
Referenced to CMOUT voltage, it refers to the
±2
mV
_HGM
mode
maximum voltage at the IN pin before clipping; It
includes dark voltage of the thermopile and
VINMAX
Max input signal Low gain
±12
mV
signal voltage.
_LGM
mode
VOS
Input Offset Voltage
-165
µV
G _HGM
Gain High gain mode
250
V/V
G_LGM
Gain Low gain mode
42
V/V
GE
Gain Error
Both HGM and LGM
2.5
%
VDD –
VOUT
Output Voltage Range
0.5
0.5
V
1mV input step signal, HGM, Vout measured at
PhDly
Phase Delay
6
μs
Vdd/2
Phase Delay variation with
1mV input step signal, HGM, Vout measured at
TCPhDly
416
ns
Temperature
Vdd/2,
SSBW
Small Signal Bandwidth
Vin = 1mVpp, Gain = 250 V/V
18
kHz
Cin
Input Capacitance
100
pF
Programmable Gain Amplifier (PGA) 2nd Stage, RS = 1kΩ, CL = 1µF
VINMAX
Max input signal
GAIN = 4 V/V
1.65
V
VINMIN
Min input signal
0.82
V
G
Gain
Programmable in 4 steps
4
32
V/V
GE
Gain Error
Any gain
2.5
%
VDD –
VOUT
Output Voltage Range
0.2
V
0.2
100mV input sine 35kHz signal, Gain = 8, VOUT
PhDly
Phase Delay
1
µs
measured at 1.65V, RL = 10kΩ
(1)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
(2)
Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using
statistical quality control (SQC) method.
(3)
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
6
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP91051



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