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SPC5604BF2MLL6 データシート(PDF) 52 Page - Freescale Semiconductor, Inc |
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SPC5604BF2MLL6 データシート(HTML) 52 Page - Freescale Semiconductor, Inc |
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52 / 109 page  MPC5604B/C Microcontroller Data Sheet, Rev. 11 Package pinouts and signal descriptions Freescale Semiconductor 52 Figure 11. VDD_HV and VDD_BV maximum slope When STANDBY mode is used, further constraints are applied to the both VDD_HV and VDD_BV in order to guarantee correct regulator function during STANDBY exit. This is described on Figure 12. STANDBY regulator constraints should normally be guaranteed by implementing equivalent of CSTDBY capacitance on application board (capacitance and ESR typical values), but would actually depend on exact characteristics of application external regulator. VDD_HV t d d VDD POWER UP POWER DOWN VDD_HV(MAX) FUNCTIONAL RANGE VDD_HV(MIN) VDD_HV t d d VDD POWER UP POWER DOWN VDD_HV(MAX) FUNCTIONAL RANGE VPORH(MAX) |
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