REV. A

–4–

AD22151

FIELD – Gauss

–600

400

–400

–200

0

200

0

0.005

0.010

0.015

0.020

0.025

600

Figure 5. Signal Drift over Temperature (–40

∞C to

+150

∞C) vs. Field (–200 ppm); 5 V Supply

TEMPERATURE – C

0.25

0.20

0

0.15

0.05

0.10

–40

10

60

110

160

–0.05

Figure 6. Gain Variation from 25

∞C vs. Temperature

(–200 ppm) Field; R1 –15 k

W

FIELD – Gauss

–600

400

–400

–200

0

200

0

0.010

0.015

0.020

0.025

600

0.005

0.045

0.040

0.030

0.035

–800

800

Figure 7. Signal Drift over Temperature (–40

∞C to

+150

∞C) vs. Field (–2000 ppm); 5 V Supply

TEMPERATURE – C

2.0

1.8

1.0

1.6

1.2

1.4

–40

10

60

110

160

–0.2

0.8

0.6

0.4

0.2

0

Figure 8. Gain Variation (from 25

∞C) vs. Temperature

(–2000 ppm Field; R1 = 12 k

W)

TEMPERATURE COMPENSATION

The AD22151 incorporates a “thermistor” transducer that

detects relative chip temperature within the package. This

function provides a compensation mechanism for the various

temperature dependencies of the Hall cell and magnet combina-

tions. The temperature information is accessible at Pins 1 and

2 (

+2900 ppm/

∞C) and Pin 3 ( –2900 ppm/∞C), as repre-

sented by Figure 9. The compensation voltages are trimmed

∞C. Pin 3 is internally connected to

the negative TC voltage via an internal resistor (see the Func-

tional Block Diagram). An external resistor connected between

Pin 3 and Pins 1 or 2 will produce a potential division of the

two complementary TC voltages to provide optimal compensa-

tion. The Pin 3 internal resistor provides a secondary TC

designed to reduce second order Hall cell temperature sensitivity.

TEMPERATURE – C

1.0

0.8

0

0.6

0.2

0.4

150

112

74

–2

–40

–0.2

–0.4

–0.6

–0.8

–1.0

36

TC1, TC2 VOLTS

TC3 VOLTS

Figure 9. TC1, TC2, and TC3 with Respect to Reference

vs. Temperature

The voltages present at Pins 1, 2, and 3 are proportional to the

supply voltage. The presence of the Pin 2 internal resistor dis-

tinguishes the effective compensation ranges of Pins 1 and 2.

(See temperature configuration in Figures 1 and 2, and typical

resistor values in Figures 10 and 11.)

Variation occurs in the operation of the gain temperature com-

pensation for two reasons. First, the die temperature within the

package is somewhat higher than the ambient temperature due