AD7671

–13–

TYPICAL CONNECTION DIAGRAM

Figure 5 shows a typical connection diagram for the AD7671. Different circuitry shown on this diagram is optional and is discussed below.

100nF

10 F

100nF

10 F

AVDD

10 F

100nF

AGND

DGND

DVDD

OVDD

OGND

SER/

PAR

CNVST

BUSY

SDOUT

SCLK

RD

CS

RESET

PD

REFGND

2.5V REF

REF

20

D

CLOCK

AD7671

C/ P/DSP

SERIAL

PORT

DIGITAL SUPPLY

(3.3V OR 5V)

ANALOG

SUPPLY

(5V)

DVDD

OB/

2C

NOTE 8

BYTESWAP

DVDD

50k

100nF

1M

INA

100nF

U2

IND

INGND

ANALOG

INPUT

( 10V)

2.7nF

U1

15

10 F

NOTE 2

NOTE 1

NOTE 3

NOTE 7

NOTE 4

50

INC

INB

NOTE 6

NOTES

1. SEE VOLTAGE REFERENCE INPUT SECTION.

3. OPTIONAL CIRCUITRY FOR HARDWARE GAIN CALIBRATION.

4. FOR BIPOLAR RANGE ONLY. SEE SCALER REFERENCE INPUT SECTION.

5. THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.

6. WITH 0V TO 2.5V RANGE ONLY. SEE ANALOG INPUTS SECTION.

7. OPTION. SEE POWER SUPPLY SECTION.

8. OPTIONAL LOW JITTER

CNVST. SEE CONVERSION CONTROL SECTION.

+

+

+

++

+

+

AD8031

AD8021

50

ADR421

NOTE 5

WARP

IMPULSE

Figure 5. Typical Connection Diagram (

±10 V Range Shown)

Table III. Output Codes and Ideal Input Voltages

Digital Output

Code (Hexa)

Straight Twos

Description

Analog Input

Binary

Complement

Full-Scale Range

1

±10 V

±5 V

±2.5 V

0 V to 10 V

0 V to 5 V

0 V to 2.5 V

Least Significant Bit 305.2

mV

152.6

mV

76.3

mV

152.6

mV

76.3

mV

38.15

mV

FSR – 1 LSB

9.999695 V

4.999847 V

2.499924 V

9.999847 V

4.999924 V 2.499962 V

FFFF

2

7FFF

2

Midscale + 1 LSB

305.2

mV

152.6

mV

76.3

mV

5.000153 V

2.570076 V 1.257038 V

8001

0001

Midscale

0 V

0 V

0 V

5 V

2.5 V

1.25 V

8000

0000

Midscale – 1 LSB

–305.2

mV

–152.6

mV

–76.3

mV

4.999847 V

2.499924 V 1.249962 V

7FFF

FFFF

–FSR + 1 LSB

–9.999695 V –4.999847 V –2.499924 V 152.6

mV

76.3

mV

38.15

mV

0001

8001

–FSR

–10 V

–5 V

–2.5 V

0 V

0 V

0 V

0000

3

8000

3

NOTES

REV. C