ADP5037ACPZ-R7 datasheet(24/28 Pages) AD

部品番号	ADP5037ACPZ-R7

部品情報	Dual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs

PDF	28 Pages

Scroll/Zoom	100%

メーカー	AD [Analog Devices]

ホームページ	http://www.analog.com

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24 / 28 page

ADP5037

Data Sheet

Rev. D | Page 24 of 28

PCB LAYOUT GUIDELINES

Poor layout can affect ADP5037 performance, causing electro-

magnetic interference (EMI) and electromagnetic compatibility

(EMC) problems, ground bounce, and voltage losses. Poor layout

can also affect regulation and stability. A good layout is

implemented using the following guidelines.

•

Place the inductor, input capacitor, and output capacitor

close to the IC using short tracks. These components carry

high switching frequencies, and large tracks act as antennas.

•

Route the output voltage path away from the inductor and

SW node to minimize noise and magnetic interference.

•

Maximize the size of ground metal on the component side

to help with thermal dissipation.

•

Use a ground plane with several vias connecting to the

component side ground to further reduce noise interference

on sensitive circuit nodes.

•

Connect VIN1, VIN2, and AVIN together close to the IC

using short tracks.

In addition, refer to the UG-271 User Guide.

ADP5037ACPZ-R7 データシート(PDF) 24 Page - Analog Devices