MP1499 – 16V/5A PEAK SYNCHRONOUS STEP-DOWN CONVERTER

MP1499 Rev. 1.0

www.MonolithicPower.com

10

7/26/2012

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© 2012 MPS. All Rights Reserved.

OPERATION

The MP1499 is a high frequency synchronous

rectified step-down switch mode converter with

built in internal power MOSFETs. It offers a

very compact solution to achieve 5A peak

output current over a wide input supply range

with excellent load and line regulation.

The MP1499 operates in a fixed frequency,

peak current control mode to regulate the

output voltage. A PWM cycle is initiated by the

internal clock. The integrated high-side power

MOSFET is turned on and remains on until its

current reaches the value set by the COMP

voltage. When the power switch is off, it

remains off until the next clock cycle starts. If, in

90% of one PWM period, the current in the

power MOSFET does not reach the COMP set

current value, the power MOSFET will be

forced to turn off.

Internal Regulator

Most of the internal circuitries are powered from

the 5V internal regulator. This regulator takes

the VIN input and operates in the full VIN range.

When VIN is greater than 5.0V, the output of

the regulator is in full regulation. When VIN is

lower than 5.0V, the output decreases, a 0.1uF

ceramic capacitor for decoupling purpose is

required.

Error Amplifier

The error amplifier compares the FB pin voltage

with the internal 0.807V reference (REF) and

outputs a current proportional to the difference

between the two. This output current is then

used to charge or discharge the internal

compensation network to form the COMP

voltage, which is used to control the power

MOSFET current. The optimized internal

compensation network minimizes the external

component counts and simplifies the control

loop design.

Enable/SYNC control

EN/Sync is a digital control pin that turns the

regulator on and off. Drive EN high to turn on

the regulator, drive it low to turn it off. There is

an internal 1MΩ resistor from EN/Sync to

GND thus EN/Sync can be floated to shut down

the chip.

The EN pin is clamped internally using a 6.5V

series-Zener-diode as shown in Figure 2.

Connecting the EN input pin through a pullup

EN input current to less than 100µA.

For example, with 12V connected to Vin,

Connecting the EN pin directly to a voltage

source without any pullup resistor requires

limiting the amplitude of the voltage source to

≤

6V to prevent damage to the Zener diode.

Figure 2—6.5V Zener Diode Connection

The chip can be synchronized to external clock

range from 200kHz up to 2MHz through this pin

as soon as an external clock is added to this

pin, with the internal clock rising edge

synchronized to the external clock rising edge.

Under-Voltage Lockout (UVLO)

The

MP1499

has

under-voltage

lock-out

protection (UVLO). When the VCC voltage is

higher than the UVLO rising threshold voltage,

the MP1499 will be powered up. It shuts off

when the VCC voltage is lower than the UVLO

falling threshold voltage. This is non-latch

protection.

The MP1499 is disabled when the input voltage

falls below 3.25 V. If an application requires a

higher under-voltage lockout (UVLO), use the

EN pin as shown in Figure 3 to adjust the input

voltage UVLO by using two external resistors. It

is recommended to use the enable resistors to

set the UVLO falling threshold (VSTOP) above

4.5V. The rising threshold (VSTART) should be

set to provide enough hysteresis to allow for

any input supply variations.