MP2007

3A, 1.3V–6.0V

DDR Memory Termination Regulator

MP2007 Rev. 0.9

www.MonolithicPower.com

1

7/23/2009

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

© 2009 MPS. All Rights Reserved.

The Future of Analog IC Technology

DESCRIPTION

The MP2007 integrates the DDR memory

termination regulator with the output voltage

(VTT) and a buffered VTTREF outputs is a half

of VREF.

The VTT-LDO is a 3A sink/source tracking

termination regulator. It is specifically designed

for

low-cost/low-external

component

count

systems, where space is a premium.

The MP2007 maintains a fast transient

response only requiring 20uF (2x10uF) of

ceramic output capacitance. The MP2007

supports Kelvin sensing functions.

The MP2007 is available in the 8-pin MSOP with

Exposed PAD package and is specified from

FEATURES

•

VDDQ Voltage Range: 1.3V to 6.0 V

•

Up to 3A Integrated Sink/Source Linear

Regulator with Accurate VREF/2 Divider

Reference for DDR Termination

•

Requires Only 20uF Ceramic Output

Capacitance

•

Drive Voltage Range: 4.5 V to 5.5 V

•

1.3V Input (VDDQ) Helps Reduce Total

Power Dissipation

•

Integrated Divider Tracks VREF for VTT

and VTTREF

•

Kelvin Sensing (VTTSEN)

•

±20mV Accuracy for VTT and VTTREF

•

Built-In Soft-Start, UVLO and OCL

•

Thermal Shutdown

APPLICATIONS

•

Notebook DDR2/3 Memory Supply and

Termination Voltage in ACPI Compliant

•

Active Termination Busses

“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of

Monolithic Power Systems, Inc.

TYPICAL APPLICATION

C4

0.1uF

C7

4.7uF

C1

10uF

1206

VTTEN

MP2007DH

REF

VDRV

VTTREF

VTTSEN

VTT

VDDQ

DDQ

5V

6

1

3

EN

GND

GND

R3

20

R2

100k

5

7

VTTREF

GND

VTT

C6

0.1uF

C9

NC

C3

10uF

1206

C2

10uF

1206

8

4

2