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PIC10LF322T-EMCSQTP データシート(PDF) 39 Page - Microchip Technology |
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PIC10LF322T-EMCSQTP データシート(HTML) 39 Page - Microchip Technology |
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39 / 210 page  2011 Microchip Technology Inc. Preliminary DS41585A-page 39 PIC10(L)F320/322 5.10 Power Control (PCON) Register The Power Control (PCON) register contains flag bits to differentiate between a: • Power-on Reset (POR) • Brown-out Reset (BOR) The PCON register bits are shown in Register 5-2. TABLE 5-5: SUMMARY OF REGISTERS ASSOCIATED WITH RESETS TABLE 5-6: SUMMARY OF CONFIGURATION WORD WITH RESETS REGISTER 5-2: PCON: POWER CONTROL REGISTER U-0 U-0 U-0 U-0 U-0 U-0 R/W/HC-q/u R/W/HC-q/u — — — — — — POR BOR bit 7 bit 0 Legend: HC = Bit is cleared by hardware R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared q = Value depends on condition bit 7-2 Unimplemented: Read as ‘0’ bit 1 POR: Power-on Reset Status bit 1 = No Power-on Reset occurred 0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs) bit 0 BOR: Brown-out Reset Status bit 1 = No Brown-out Reset occurred 0 = A Brown-out Reset occurred (must be set in software after a Power-on Reset or Brown-out Reset occurs) Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page BORCON SBOREN BORFS — — — — — BORRDY 35 PCON — — — — — —POR BOR 39 STATUS IRP RP1 RP0 TO PD Z DC C 15 WDTCON — — WDTPS<4:0> SWDTEN 55 Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Resets. Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0 Register on Page CONFIG 13:8 — — — WRT<1:0> BORV LPBOR LVP 22 7:0 CP MCLRE PWRTE WDTE<1:0> BOREN<1:0> FOSC Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources. |
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