データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

MP4470GL データシート(PDF) 16 Page - Monolithic Power Systems

部品番号 MP4470GL
部品情報  High-Efficiency, Fast-Transient, 5A, 36V Synchronous, Step-Down Converter
PDF  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  MPS [Monolithic Power Systems]
ホームページ  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP4470GL データシート(HTML) 16 Page - Monolithic Power Systems

Back Button MP4470GL Datasheet HTML 10Page - Monolithic Power Systems MP4470GL Datasheet HTML 11Page - Monolithic Power Systems MP4470GL Datasheet HTML 12Page - Monolithic Power Systems MP4470GL Datasheet HTML 13Page - Monolithic Power Systems MP4470GL Datasheet HTML 14Page - Monolithic Power Systems MP4470GL Datasheet HTML 15Page - Monolithic Power Systems MP4470GL Datasheet HTML 16Page - Monolithic Power Systems MP4470GL Datasheet HTML 17Page - Monolithic Power Systems MP4470GL Datasheet HTML 18Page - Monolithic Power Systems  
Zoom Inzoom in Zoom Outzoom out
 16 / 18 page
background image
MP4470/4470A–HIGH-EFFICIENCY, FAST-TRANSIENT, SYNCHRONOUS, STEP-DOWN CONVERTER
MP4470/4470A Rev. 1.1
www.MonolithicPower.com
16
8/26/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
LAYOUT RECOMMENDATION
1. Place high-current paths (GND, IN, and SW)
very close to the device with short, direct, and
wide traces.
2. Place input capacitors on both VIN sides
(PIN8 and PIN19) and as close to the IN and
GND pins as possible.
3. Place the decoupling capacitor as close to
the VCC and GND pins as possible.
4. Keep the switching node SW short and away
from the feedback network.
5. Place the external feedback resistors next to
the FB pin. Do not place vias on the FB trace.
6. Keep the BST voltage path (BST, C3, and
SW) as short as possible.
7. Connect the bottom IN and SW pads to a
large copper area to achieve better thermal
performance.
8. A Four-layer layout is strongly recommended
to achieve better thermal performance.
C2A
C2B
Top Layer
Inner1 Layer
Inner2 Layer
Bottom Layer
Figure 10: PCB Layout



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com