MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER

MP8761 Rev. 1.1

www.MonolithicPower.com

17

11/4/2013

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APPLICATION INFORMATION

Output-Voltage, Large-ESR Capacitors

For applications that use electrolytic or POS

capacitors with large ESR values as output

capacitors, the feedback resistors—R1 and R2

as shown in Figure 10—set the output voltage.

R1

R2

ESR

POSCAP

SW

L

FB

Figure 10: Simplified POSCAP Circuit

First, choose an R2 that balances between high

quiescent current loss (lower R2) and high noise

sensitive on FB (higher R2). A typical value falls

within 5kΩ-50kΩ, using a comparatively larger

OUT

OUT

REF

REF

1

VV

V

2

R1

R2

V

−× Δ

−

=×

(15)

Where

OUT

V

Δ

is the output ripple determined by

equation 24.

Output-Voltage, Small-ESR Capacitors

R1

R2

Ceramic

SW

FB

L

R9

R4

C4

Figure 11: Simplified Ceramic Capacitor Circuit

When using a low-ESR, ceramic capacitor on the

output, add an external voltage ramp to the FB

the resistor divider (shown in Figure 11) influence

equation 7. Select R2 to balance between high

quiescent current loss and FB noise sensitivity.

Choose R2 within 5kΩ-50kΩ, using a larger R2

high. Determine the value of R1 as follows:

9

R

4

R

2

R

V

V

V

2

R

1

R

)

AVG

(

FB

OUT

)

AVG

(

FB

+

−

−

=

(16)

where the load regulation is strictly related to the

9

R

2

R

//

1

R

2

R

//

1

R

V

2

1

V

V

RAMP

REF

)

AVG

(

FB

+

×

×

+

=

(17)

Usually, R9 is 0Ω, though it can also be set

following equation 18 for better noise immunity. It

should also be less than 20% of R1//R2 to

1R1 R2

R9

5R1 R2

×

<×

+

(18)

Using equations 16 and 17 to calculate the

output voltage can be complicated. To simplify

the R1 calculation in equation 16, add a DC-

from R4 and R9. Figure 12 shows a simplified

circuit with external ramp compensation and a

DC-blocking capacitor. The addition of this

capacitor simplifies the R1 calculation as per

equation 19 for PWM mode operation.

2

R

V

2

1

V

V

2

1

V

V

1

R

RAMP

REF

RAMP

REF

OUT

×

×

+

×

−

−

=

(19)

10×C4 for better DC blocking performance, but

smaller than 0.47uF to account for start-up

noise immunity, reduce R1 and R2 to limit their

effects on system start-up. Note that even with