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AS3931 データシート(PDF) 19 Page - ams AG

部品番号 AS3931
部品情報  3D Low Power Wakeup Receiver
PDF  31 Pages
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メーカー  AMSCO [ams AG]
ホームページ  http://www.ams.com
Logo AMSCO - ams AG

AS3931 データシート(HTML) 19 Page - ams AG

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www.austriamicrosystems.com/AS3931
Revision 6.2
18 - 30
AS3931
Datasheet - Configuring the Product
9 Configuring the Product
9.1 Serial Programming Interface
The AS3931 is programmed via an unidirectional three wire Serial Programming Interface.The 3 lines are:
CS: Chip Select, used for selecting AS3931 and for data latching
SCL: Serial Clock
SDA: Serial Data
A block of 8 bit data starting with the LSB is sent according to the diagram shown in Figure 19. The received block of 8 bit data is shifted into an
8 bit latch. The two LSBs are register address bits and the remaining 6 bits are data bits. The register address bits A1 and A0 are decoded and
the 6 data bits are stored into one of three 6 bit registers with the falling edge of CS.
Figure 19. Protocol of 8 Bit Data Serial Transmission
9.2 Power On Register
Table 4. Register Data
Bit
POR state
Description
P0
1
Enable Channel 1
P1
1
Enable Channel 2
P2
1
Enable Channel 3
P3
1
Enable Regulator
P4
0
Antenna Rotator Bit 1
P5
0
Antenna Rotator Bit 2
Table 5. Register Address
Bit
Value
A0
0
A1
0
CS
SDA
ADDRESS
DATA
A0
A 1
D 0
D1
D 2
D3
D4
D5
D =T : TEST MODE REGISTER
SCL
D =P : POWER ON REGISTER
D =C : CHANNEL SELECT REGISTER
D = M: CORRELATOR MODE REGISTER



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