SCF5250LPV100 datasheet(18/56 Pages) FREESCALE

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SCF5250 Data Sheet: Technical Data, Rev. 1.3

Freescale Semiconductor

3.15

Queued Serial Peripheral Interface (QSPI)

The QSPI interface is a high-speed serial interface allowing transmit and receive of serial data. Pin

descriptions are given in Table 11.

3.16

Crystal Trim

The XTRIM/GPIO0 output produces a pulse-density modulated phase/frequency difference signal to be

used after low-pass filtering to control varicap-voltage to control crystal oscillation frequency. This will

lock the crystal to the incoming digital audio signal.

3.17

Clock Out

The MCLK1/GPIO11 and QSPI_CS2/MCLK2/GPIO24 can serve as DAC clock outputs. When

programmed as DAC clock outputs, these signals are directly derived from the crystal oscillator or clock

Input (CRIN).

DDATAO/CTS1/SDATA0_SDIO1/GPIO1 Secure Digital serial data bit 0

Memory Stick interface 1 data I/O

SCL0/SDATA1_BS1/GPIO41

Secure Digital serial data bit 1

Memory Stick interface 1 strobe

DDATA1/RTS1/SDATA2_BS2/GPIO2

Secure Digital serial data bit 2

Memory Stick interface 2 strobe

Reset output signal

Selection between Reset function and SDATA2_BS2 is done by programming PLLCR

SDA0/SDATA3/GPIO42

Secure Digital serial data bit 3

Table 11. Queued Serial Peripheral Interface (QSPI) Signals

Serial Module Signal

Description

QSPICLK/SUBR/GPIO25

Multiplexed signal IIC interface clock or QSPI clock output Function select is done via

PLLCR register.

RCK/QSPIDIN/QSPI_DOUT/GPIO26

Multiplexed signal IIC interface data or QSPI data input. Function select is done via

PLLCR register.

RCK/QSPI_DIN/QSPI_DOUT/GPIO26

QSPI_DOUT/SFSY/GPIO27

QSPI data output.

QSPICS0/EBUIN4GPIO15

4 different QSPI chip selects.

QSPICS1/EBUOUT2/GPIO16

QSPICS2/MCLK2/GPIO24

CS1/QSPICS3/GPIO28

Table 10. Flash Memory Card Signals (continued)

Flash Memory Signal

Description

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