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ST1S40 データシート(PDF) 14 Page - STMicroelectronics |
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ST1S40 データシート(HTML) 14 Page - STMicroelectronics |
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14 / 29 page ![]() Application information ST1S40 14/29 DocID17928 Rev 5 6 Application information 6.1 Input capacitor selection The capacitor connected to the input must be capable of supporting the maximum input operating voltage and the maximum RMS input current required by the device. The input capacitor is subject to a pulsed current, the RMS value of which is dissipated over its ESR, affecting the overall system efficiency. So the input capacitor must have an RMS current rating higher than the maximum RMS input current and an ESR value compliant with the expected efficiency. The maximum RMS input current flowing through the capacitor can be calculated as: Equation 14 where Io is the maximum DC output current, D is the duty cycle, is the efficiency. Considering , this function has a maximum at D = 0.5 and is equal to Io/2. The peak-to-peak voltage across the input capacitor can be calculated as: Equation 15 where ESR is the equivalent series resistance of the capacitor. Given the physical dimension, ceramic capacitors can well meet the requirements of the input filter sustaining a higher input RMS current than electrolytic / tantalum types. In this case the equation of CIN as a function of the target peak-to-peak voltage ripple (VPP) can be written as follows: Equation 16 neglecting the small ESR of ceramic capacitors. Considering = 1, this function has its maximum in D = 0.5, therefore, given the maximum peak-to-peak input voltage (VPP_MAX), the minimum input capacitor (CIN_MIN) value is: Equation 17 Typically, CIN is dimensioned to keep the maximum peak-to-peak voltage ripple in the order of 1% of VINMAX. IRMS IO D 2D 2 --------------- – D 2 2 ------- + = VPP IO CIN FSW ------------------------- 1 D ---- – D D ---- 1D – + ESR IO + = CIN IO VPP FSW --------------------------- 1 D ---- – D D ---- 1D – + = CIN_MIN IO 2VPP_MAX FSW ------------------------------------------------ = |
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